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Part: LH28F320S5H-L
Category:
Description:
Company: Sharp Microelectronics of the Americas
Datasheet: Download LH28F320S5H-L datasheet File size : 4161 kB
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LH28F320S3-L/S3H-L
LH28F320S3-L/S3H-L
DESCRIPTION
The LH28F320S3-L/S3H-L flash memories with Smart 3 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide range of applications, having high programming performance is achieved through highly-optimized page buffer operations. Their symmetrically-blocked architecture, flexible voltage and enhanced cycling capability provide for highly flexible component suitable for resident flash arrays, SIMMs and memory cards. Their enhanced suspend capabilities provide for an ideal solution for code + data storage applications. For secure code storage applications, such as networking, where code is either directly executed out of flash or downloaded to DRAM, the LH28F320S3-L/S3H-L offer three levels of protection : absolute protection with VPP at GND, selective hardware block locking, or flexible software block locking. These alternatives give designers ultimate control of their code security needs. The LH28F320S3-L/S3H-L are conformed to the flash Scalable Command Set (SCS) and the Common Flash Interface (CFI) specification which enable universal and upgradable interface, enable the highest system/device data transfer rates and minimize device and system-level implementation costs.
32 M-bit (4 MB x 8/2 MB x 16) Smart 3 Flash Memories (Fast Programming)
· High performance read access time LH28F320S3-L11/S3H-L11 110 ns (3.3±0.3 V)/140 ns (2.7 to 3.6 V) LH28F320S3-L14/S3H-L14 140 ns (3.3±0.3 V)/160 ns (2.7 to 3.6 V) · Enhanced automated suspend options Write suspend to read Block erase suspend to write Block erase suspend to read · Enhanced data protection features Absolute protection with VPP = GND Flexible block locking Erase/write lockout during power transitions · SRAM-compatible write interface · User-configurable x8 or x16 operation · High-density symmetrically-blocked architecture Sixty-four 64 k-byte erasable blocks · Enhanced cycling capability 100 000 block erase cycles 6.4 million block erase cycles/chip · Low power management Deep power-down mode Automatic power saving mode decreases ICC in static mode · Automated write and erase Command user interface Status register · ETOXTM V nonvolatile flash technology · Packages 56-pin SSOP (SSOP056-P-0600) 80-ball CSP (FBGA080/064-P-0818)
ETOX is a trademark of Intel Corporation.
FEATURES
· Smart 3 technology 2.7 V or 3.3 V VCC 2.7 V, 3.3 V or 5 V VPP · High speed write performance Two 32-byte page buffers 2.7 µs/byte write transfer rate · Common Flash Interface (CFI) Universal & upgradable interface · Scalable Command Set (SCS)
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
P
R
E
L
IM
-1-
IN
A
R
Y
LH28F320S3-L/S3H-L
COMPARISON TABLE
VERSIONS LH28F320S3-L LH28F320S3H-L OPERATING TEMPERATURE 0 to +70°C 40 to +85°C DC CHARACTERISTICS VCC deep power-down current (MAX.) 20 µA 25 µA
PIN CONNECTIONS
56-PIN SSOP
CE0# A12 A13 A14 A15 NC CE1# A21 A20 A19 A18 A17 A16 VCC GND DQ6 DQ14 DQ7 DQ15 STS OE# WE# WP# DQ13 DQ5 DQ12 DQ4 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
TOP VIEW
VPP RP# A11 A10 A9 A1 A2 A3 A4 A5 A6 A7 GND A8 VCC DQ9 DQ1 DQ8 DQ0 A0 BYTE# NC NC DQ2 DQ10 DQ3 DQ11 GND
80-BALL CSP
1 A NC B C D E F G H NC NC 2 NC 3 4
E
L
5
6
IM
(SSOP056-P-0600)
7 NC A17 A15 A12 RP# A9 A7 8 A20 A18 VCC
CE0#
9 A21 A19 A14 A13 A11 A10 A5 A3
IN
10 NC
CE1#
11 WP# WE# DQ6 NC NC DQ9 NC NC
12 OE# DQ15 DQ5 DQ12 DQ3 DQ10 DQ0
BYTE#
A
13 STS DQ7 GND VCC GND VCC DQ8 A0 14 NC DQ14 DQ13 DQ4 DQ11 DQ2 DQ1 NC NC NC NC NC 15 NC 16 NC 17 18 19 NC 20 NC A16 NC NC GND A2 A1 VPP A8 A6 A4
NC
NC
P
R
NC
NC
NC
(FBGA080/064-P-0818)
-2-
R
Y
LH28F320S3-L/S3H-L
BLOCK DIAGRAM
DQ0-DQ15
OUTPUT BUFFER
INPUT BUFFER
QUERY ROM OUTPUT MULTIPLEXER I/O LOGIC
V CC BYTE# CE# WE# OE# RP# WP#
REGISTER REGISTER PAGE BUFFER DATA COMMAND USER INTERFACE
MULTIPLEXER DATA COMPARATOR
A IN
R
PROGRAM/ERASE VOLTAGE SWITCH
STATUS REGISTER
Y
IDENTIFIER
A0-A21
INPUT BUFFER
Y DECODER
Y GATING
STS VPP
WRITE STATE MACHINE
ADDRESS LATCH
X DECODER
64 64 k-BYTE BLOCKS
V CC GND
P
-3-
R
E
L
IM
ADDRESS COUNTER
Others parts begin by lh
LH-1 LH-2 LH-3 LH-4 LH-5 LH-6 LH-7 LH-8 LH-9 LH-10 LH-11
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