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Part: CXA1812Q
Category:
Multimedia
-> Video
Description: S-terminal Compatible Video I/o
Company: Sony Electronics
Datasheet: Download CXA1812Q datasheet File size : 305 kB
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CXA1812Q
S-terminal Compatible Video I/O
Description The CXA1812Q is an IC developed for processing video I/O signals in VCRs. This IC has a built-in video output circuit designed especially for use with viewfinders (VF), making this IC optimal for use in c a m c o r d e r s . In addition, both the video input s y s t e m and the viewfinder video output system provide title insertion functions, making it possible to insert characters and graphics into video signals. Features · Built-in video output circuit for use with viewfinders (title insertion function (white or black character), compatible with SY/C and composite video output) · Built-in C system EE/PB switch EE : Electric-Electric monitor mode · Title insertion function (white or black character) · C MUTE function for playback in PAL mode ( O u t p u t s C signal used for generating the composite video signal) · Built-in switch for switching between the two input systems, Y and C · Built-in 75 driver for the two input systems, Y and C (with power saving function) Structure Bipolar silicon monolithic IC 32 pin QFP (Plastic)
Absolute Maximum Ratings (Ta=25 °C) · Supply voltage VCC 7 V · Operating temperature Topr 20 to +75 °C · Storage temperature Tstg 65 to +150 °C · Allowable power dissipation PD 450 mW Operating Conditions · Supply voltage · Supply voltage range
VCC VCC
4.75 4.5 to 5.25
V V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E93701A79-TE
CXA1812Q
Block Diagram and Pin Configuration
EVFY/VOUT
EVFCOUT
INSEL
24
23
22
21
20
VOW
19
18
17
CLAMP YIN2 25 CLAMP GND 26 DDS1 BUFF 15 COUT1 16 VOB
CIN1 27
BUFF
12dB
6dB
YOUT1
VOW1
YIN1
VOB1
MUTE1
14
VCC
Y/VSEL
28
CLAMP
13
YIN
CIN2 29
12 P.SAVE
YOUTGND
30
MUTE2
DDS2
CLAMP
11
EVFYIN
YOUT 31
DRIV MUTE3
10
SEL1
YINVIN
32 BUFF DRIV
9
YOUTVCC
1 COUTGND
2 VREG
3 COUT2
4 CMUTE
5 COUT
6 SEL2
7 CIN
8 COUTVCC
--2--
CXA1812Q
Pin Description Pin No. 1 Symbol COUTGND Pin voltage 0 V Equivalent circuit --
Externally applied voltage Description Chroma 75 driver GND. 4 V internal regular output. Connect a decoupling capacitor. Do not use for external bias.
VCC 60µ 200
2
VREG
4V
--
Chroma signal output used for generating a composite video signal.
3
COUT2
2.2 V
3
GND 120µ 150µ VCC 20µ
143mVp-p
314mVp-p
4
CMUTE
0V
4 150 72k
GND VCC 660µ
Control input used for muting both the chroma signals that are input to Pins 27 (CIN1) and 29 (CIN2) and pass through the EE path, as well as the chroma signal that is input from Pin 7 (CIN). Low (0 to 0.8 V) : normal operation High (2 V to VCC) : mute Chroma 75 driver output.
5
COUT
2.2 V
5.3k 16k 2.2V 660µ 1.2m
5
GND
572mVp-p
1.256Vp-p
VCC 20µ
6
SEL2
0V
6 150 72k
GND
Control input used for switching between the signals input to Pins 27 and 29 and the signal input to Pin 7. Low (0 to 0.8 V) : signal at Pin 7 is selected High (2 V to VCC) : signals at Pins 27 and 29 are selected
--3--
CXA1812Q
Externally applied voltage Pin No. Symbol Pin voltage Equivalent circuit Description Video output chroma signal input. Coupled by means of a capacitor within the IC. Inputting a signal of 0.3 V or less may lead waveform distortion.
VCC
7
CIN
--
7 50k 150 20p
2.2V
80µ GND 143mVp-p 314mVp-p
8 9
COUTVCC YOUTVCC
4.75 V 4.75 V
-- --
Chroma 75 driver power supply. Y 75 driver power supply. Control input used for switching the signals that are input from Pins 11 (EVFYIN) and 13 (YIN). Low (0 to 0.8 V) : signal at Pin 13 is selected High (2 V to VCC) : signal at Pin 11 is selected Y signal input for viewfinder. Coupled by means of a capacitor ; in order to keep clamp error to a minimum, keep the input impedance as low as possible.
0.5Vp-p
10
SEL1
0V
Same as for Pin 6.
VCC 200
11
EVFYIN
2.5 V (Sync tip)
11 1100 1µ 50µ GND 2.5V
VCC 20µ
12
P. SAVE
0V
12 150
GND
Control input for power saver. When in power saving mode, the Y and C 75 drivers stop operating. The output of Pin 31 (YOUT) and Pin 5 (COUT) goes to high impedance. Low (0 to 0.8 V) : normal operation High (2 V to VCC) : power saving mode
72k
15k
--4--
CXA1812Q
Externally applied voltage Pin No. Symbol Pin voltage Equivalent circuit Description Video output Y signal input. Coupled by means of a capacitor; in order to keep clamp error to a minimum, keep the input impedance as low as possible.
0.5Vp-p
13
YIN
2.5 V (Sync tip)
Same as for Pin 11.
2.5V
14
VCC
4.75 V
--
Power supply other than the 75 driver. Video input chroma signal output.
15
COUT1
2.2 V
Same as for Pin 3.
143mVp-p 314mVp-p
VCC 20µ
16
VOB
0V
16 72k 150
GND VCC 90µ 200
Control input for black level insertion of the Y signals input to Pins 23 (YIN1) and 25 (YIN2). The chroma signals input from Pins 27 and 29 are also muted simultaneously. Low (0 to 0.8 V) : normal operation High (2 V to VCC) : insertion mode Video input Y signal output.
17
YOUT1
1.8 V (Sync tip)
17
0.5Vp-p
GND 180µ 250µ
1.8V
18
VOW
0V
Same as for Pin 4.
Control input for white level insertion of the Y signals input to Pins 23 and 25. The chroma signals input from Pins 27 and 29 are also muted simultaneously. This pin takes precedence over the Pin 16 control signal. Low (0 to 0.8V) : normal operation High (2 V to Vcc) : insertion mode
--5--
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