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Part: CXA1852N
Category:
Description: Quadrature Modulator For 900 Mhz-band Mobile Communications
Company: Sony Electronics
Datasheet: Download CXA1852N datasheet File size : 147 kB
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CXA1852N
Quadrature Modulator for 900 MHz-Band Mobile Communications
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Description The CXA1852N is an IC package that combines a /2 phase shifter with a quadrature modulator. T h i s is suitable for 900 MHz digital cordless telephone (CT2) and digital cellular. Features · Quadrature modulator IC has a built-in /2 phase shifter. · Local frequency = 300.1 MHz (max.); I&Q = 36 kHz (max.) · Small phase error · Operating voltage range: 2.7 to 5 V · Power saving function · 20-pin SSOP package used for set size reduction Applications · CT2 digital cordless telephone · Digital cellular Structure Bipolar silicon monolithic IC Block Diagram and Pin Configuration
Ib BIAS I BIAS GND GND GND
20 pin SSOP (Plastic)
Absolute Maximum Ratings (Ta=25 °C) · Supply voltage VCC 6 V · Operating temperature Topr 20 to +70 °C · Storage temperature Tstg 65 to +150 °C · Allowable power dissipation PD 530 mW When mounted on a 50 × 50 × 1.6 mm copperfoiled glass epoxy board Recommended Operating Conditions · Supply voltage VCC 2.7±5.0
V
NC
Ib
20
19
18
17
16
15
14
13
I
12
P/S
11
LPF
REGULATOR ADDER - AM P
F/F
LPF
M IXER
1
LO IN
2
LO b
AM P
3
GND
4
Qb BIAS
5
Q BIAS
6
GND
7
Qb
8
Q
9
GND
10
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
IF OUT
VC C
E93517A5Y-TE
CXA1852N
Pin Description Pin No. Symbol Typical pin voltage (V) Equivalent circuit Description
1
LOCAL IN
0
1 2
Local input pin. The internal resistor provides 50 matching.
2
LOCAL IN
2.0
Bias pin for the local input amplifier. Ground this pin via a capacitor.
3
GND
0
4
Q-BIAS
0.175 Local leak level adjustment pins. Normally ground these pins via 1 k resistors.
5
Q-BIAS
0.175
5 4
6
GND
0 1.85 V to 0.85 V
7
7
Q-INPU
8
Q-INPUT
1.85 V to 0.85 V
8
Q signal input pin. The input impedance is 500 k or more. (Only DC signals can be normally input at the VCC/2 DC Bias.) Q signal input pin. The input impedance is 500k or more. (Signals of up to 1 Vp-p can be input at the VCC/2 DC Bias.)
9
GND
0
10 IF OUTPUT
1.4
10
IF output pin. (An output impedance of 50 is provided by the emitter follower.)
--2--
CXA1852N
Pin No. 11
Symbol VCC
Typical pin voltage (V) 5.5 to 2.7
Equivalent circuit
Description Power supply pin.
12
POWER SAVE
0 to 5.5
12
Power saving control pin. OFF when VP/S1.0 V; ON when VP/S1.8 V
0.85 13 I-INPUT to 1.85
13
0.85 14 I-INPUT to 1.85 0
14
I signal input pin. The input impedance is 500 k or more. (Signals of up to 1 Vp-p can be input at the VCC/2 DC Bias.) I signal input pin. The input impedance is 500 k or more (Only DC signals can be normally input at the VCC/2 DC Bias.)
15
GND
16
I-BIAS
0.175 Local leak level adjustment pin. Normally ground this pin via a 1 k resistor.
17
I-BIAS
0.175
16 17
18 19 20
GND N.C GND
0 -- 0
--3--
CXA1852N
Electrical Characteristics Item Current consumption Standby current consumption IF output power Lo carrier leak Lo leak level Image rejection (side-band leak) I/Q input impedance Power saving response time Rise Fall Power saving control voltage Lo input level (Ta=25 °C, VCC=2.7 V, ZL=ZS=50 ) Min. Typ. Max. Unit Symbol Conditions 10 15.0 22 mA ICC For no signal input 330 480 µA ICC (PS) PS 15 11 7.0 dBm Pout 50 load, f=fLO/2+fI/Q dBc ISO (Lo) fI/Q=36 kHz, 1 Vp-p, fout=fLO/2 26 35.0 49.0 37 dBm PLO I/Q=VCC/2, fout=fLO/2 28.5 37.5 dBc ImR fout=fLO/2-fI/Q 500 k ZI/Q 1.0 5.0 µs TP/S (RISE) 1.0 3.0 µs TP/S (DOWN) 1.8 5.5 V VP/S (ON) 1.0 V VP/S (OFF) 17 7 dBm Loin
Design Reference Values Item I/Q third-order intermodulation distortion Lo input VSWR IF output VSWR fLO=300.1 MHz Pin=10 dBm fI/Q=36 kHz 1 Vp-p DC=VCC/2 Symbol IM3I/Q (Ta=25 °C, VCC=2.7 V, ZL=ZS=50 ) Conditions Typ. Unit fout=fLO/2-3fI/Qf 37.3 1.1 1.2 dBc X:1 X:1
--4--
CXA1852N
Electrical Characteristics Test Circuit
1/ 2VCC
1k I BIAS
1k
0. 033µ
I signal
I b BIAS
0. 01µ
GND
GND
GND
2000p
1000p
P/ S
NC
Ib
20
19
18
17
16
15
14
I
13
12
11
LPF
REGULATOR ADDER -AMP
F/ F
LPF
MI XER
AMP
1
LO IN
1000p
2
GND LO b 30p
3
Qb BIAS
4
1k Q BIAS
5
6
GND
7
Qb
8
Q
9
GND
10
1k
Signal Lo I signal Q signal VCC=VP/S VI=VIb=VQ=VQb
Frequency 300.1 MHz 36 kHz 35 kHz
50
LO SG
Input level 10 dBm 1 Vp-p 1 Vp-p
Q signal
0. 033µ
I F OUT
I/O phase difference = 90 °C DC for measuring the local leak
2.7 to 5.5 V 0.5 × VCC
--5--
VCC
Remarks
5µ
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