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Part: CXK5T81000ATM-10LLX
Category:
Description: 131072-word X 8-bit High Speed CMOS Static RAM
Company: Sony Electronics
Datasheet: Download CXK5T81000ATM-10LLX datasheet File size : 299 kB
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Datasheet text preview:
CXK5T81000ATM/AYM/AM -10LLX/12LLX
131072-word × 8-bit High Speed CMOS Static RAM
Description The CXK5T81000ATM/AYM/AM is a high speed CMOS static RAM organized as 131072-words by 8-bits. Special feature are low power consumption and high speed. The CXK5T81000ATM/AYM/AM is a suitable RAM for portable equipment with battery back up. Features · Extended operating temperature range: 25 to +85°C · Wide supply voltage range operation: 2.7 to 3.6V · Fast access time: (Access time) 3.0V operation -10LLX 100ns (Max.) -12LLX 120ns (Max.) 3.3V operation -10LLX 85ns (Max.) -12LLX 100ns (Max.) · Low standby current: 28µA (Max.) · Low data retention current: 24µA (Max.) · Low voltage data retention: 2.0V (Min.) · Package line-up CXK5T81000ATM/AYM 8mm × 20mm 32 pin TSOP package CXK5T81000AM 525mil 32 pin SOP package Function 131072-word × 8-bit static RAM Structure Silicon gate CMOS IC CXK5T81000ATM 32 pin TSOP (Plastic)
Preliminary
CXK5T81000AYM 32 pin TSOP (Plastic)
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CXK5T81000AM 32 pin SOP (Plastic)
Block Diagram
A10 A11 A9 A8 A13 A15 A16 A14 A12 A7
Buffer
Row Decoder
Memory Matrix 1024 × 1024
VCC
GND
A6 A5 A4 A3 A2 A1 A0 OE
Buffer
I/O Gate Column Decoder
Buffer WE CE1 CE2 I/O Buffer I/O1 I/O8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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PE96324-ST
CXK5T81000ATM/AYM/AM
Pin Configuration (Top View)
A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Pin Description
OE A10 CE1 I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A0 A1 A2 A3 NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O8 I/O7 I/O6 I/O5 I/O4
Symbol A0 to A16 I/O1 to I/O8 CE1, CE2 WE OE VCC GND NC
Description Address input Data input output Chip enable 1, 2 input Write enable input Output enable input Power supply Ground No connection
CXK5T81000ATM (Standard Pinout)
A4 A5 A6 A7 A12 A14 A16 NC VCC A15 CE2 WE A13 A8 A9 A11
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
CXK5T81000AYM (Mirror Image Pinout)
A3 A2 A1 A0 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE1 A10 OE
I/O1 I/O2 I/O3 GND
CXK5T81000AM
Absolute Maximum Ratings Item Supply voltage Input voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering temperature · time Symbol VCC VIN VI/O PD Topr Tstg Tsolder
(Ta = 25°C, GND = 0V) Rating 0.5 to +4.6 0.51 to VCC + 0.5 0.51 to VCC + 0.5 0.7 25 to +85 55 to +150 235 · 10 Unit V V V W °C °C °C · s
1 VIN, VI/O = 3.0V Min. for pulse width less than 50ns.
Truth Table CE1 CE2 H × L L L × L H H H OE × × H L × WE × × H H L Mode Not selected Not selected Output disable Read Write I/O pin High Z High Z High Z Data out Data in VCC Current ISB1, ISB2 ISB1, ISB2 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3
× : "H" or "L"
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CXK5T81000ATM/AYM/AM
DC Recommended Operating Conditions Item Supply voltage Input high voltage Input low voltage Symbol VCC VIH VIL VCC = 2.7 to 3.6V Min. 2.7 2.4 0.31 Typ. 3.3 -- -- Max. 3.6 VCC + 0.3 0.4 Min. 3.0
(Ta = 25 to +85°C, GND = 0V) VCC = 3.3V ± 0.3V Typ. 3.3 -- -- Max. 3.6 VCC + 0.3 0.6 V Unit
2.2 0.31
1 VIL = 3.0V Min. for pulse width less than 50ns.
Electrical Characteristics · DC Characteristics Item Input leakage current Output leakage current Symbol ILI ILO (VCC = 2.7 to 3.6V, GND = 0V, Ta = 25 to +85°C) Test conditions VIN = GND to VCC CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC CE1 = VIL, CE2 = VIH VIN = VIH or VIL IOUT = 0mA Min. cycle duty = 100% IOUT = 0mA Cycle time 1µs duty = 100% IOUT = 0mA CE1 0.2V CE2 Vcc 0.2V VIL 0.2V VIH Vcc 0.2V 25 to +85°C CE2 0.2V CE1 Vcc 0.2V 25 to +70°C or CE2 Vcc 0.2V +25°C 10LLX 12LLX Min. 1 1 Typ.1 -- -- Max. +1 +1 Unit µA µA
Operating power supply current
ICC1
-- -- --
1 252 25
3 353 35
mA
ICC2
mA
Average operating current ICC3
--
5
10
mA
-- -- -- -- 2.4 --
-- -- 0.48 0.12 -- --
28 14 -- 1.4 -- 0.4 mA V V µA
Standby current
ISB1
{
ISB2 Output high voltage Output low voltage VOH VOL
CE1 = VIH or CE2 = VIL IOH = 2.0mA IOL = 2.0mA
1 VCC = 3.3V, Ta = 25°C 2 ICC2 = 30mA for 3.3V operation (VCC = 3.3V ± 0.3V) 3 ICC2 = 40mA for 3.3V operation (VCC = 3.3V ± 0.3V)
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CXK5T81000ATM/AYM/AM
I/O capacitance Item Input capacitance I/O capacitance Symbol Test conditions CIN CI/O VIN = 0V VI/O = 0V Min. -- --
(Ta = 25°C, f = 1MHz) Typ. -- -- Max. 8 10 Unit pF pF
Note) This parameter is sampled and is not 100% tested.
AC Characteristics · AC test conditions Item Input pulse high level Input pulse low level Input rise time Input fall time Input and output reference level Output load conditions -10LLX -12LLX VIH = 2.4V VIL = 0.4V (Ta = 25 to +85°C) Conditions VCC = 2.7 to 3.6V VCC = 3.3V ± 0.3V VIH = 2.2V VIL = 0.6V
TTL · Test circuit
tr = 5ns tf = 5ns
tr = 5ns tf = 5ns
CL
1.4V 1.4V CL1 = 100pF, 1TTL CL1 = 30pF, 1TTL CL1 = 100pF, 1TTL CL1 = 100pF, 1TTL
1 CL includes scope and jig capacitances.
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CXK5T81000ATM/AYM/AM
· Read cycle (WE = "H") VCC = 2.7 to 3.6V Item Symbol -10LLX Min. Read cycle time Address access time Chip enable access time (CE1) Chip enable access time (CE2) Output enable to output valid Output hold from address change Chip enable to output in low Z (CE1, CE2) Output enable to output in low Z (OE) Chip disable to output in high Z (CE1, CE2) Output disable to output in high Z (OE) Max. -- 100 100 100 50 -- -- -- 40 35 -12LLX Min. 120 -- -- -- -- 10 10 5 -- -- Max. -- 120 120 120 60 -- -- -- 40 35 VCC = 3.3V ± 0.3V -10LLX Min. Max. 85 -- -- -- -- 10 10 5 -- -- -- 85 85 85 40 -- -- -- 35 30 -12LLX Min. 100 -- -- -- -- 10 10 5 -- -- Max. -- 100 100 100 50 -- -- -- 40 35 ns ns ns ns ns ns ns ns ns ns Unit
tRC tAA tCO1 tCO2 tOE tOH tLZ1 tLZ2 tOLZ tHZ11 tHZ21 tOHZ1
100 -- -- -- -- 10 10 5 -- --
1 tHZ1, tHZ2 and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage levels.
· Write cycle VCC = 2.7 to 3.6V Item Symbol -10LLX Min. Write cycle time Address valid to end of write Chip enable to end of write Data to write time overlap Data hold from write time Write pulse width Address setup time Write recovery time (WE) Write recovery time (CE1, CE2) Output active from end of write Write to output in high Z 100 tWC 80 tAW 80 tCW 40 tDW 0 tDH 70 tWP 0 tAS 0 tWR 0 tWR1 5 tOW tWHZ2 -- Max. -- -- -- -- -- -- -- -- -- -- 40 -12LLX Min. 120 100 100 50 0 70 0 0 0 5 -- Max. -- -- -- -- -- -- -- -- -- -- 40 VCC = 3.3V ± 0.3V -10LLX Min. Max. 85 70 70 35 0 60 0 0 0 5 -- -- -- -- -- -- -- -- -- -- -- 35 -12LLX Min. 100 80 80 40 0 70 0 0 0 5 -- Max. -- -- -- -- -- -- -- -- -- -- 40 ns ns ns ns ns ns ns ns ns ns ns Unit
2 tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as output voltage level.
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