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Part: CXK5V16100TM-85LLX

Category:

Description: 65536-word X 16-bit High Speed CMOS Static RAM

Company: Sony Electronics

Datasheet: Download CXK5V16100TM-85LLX datasheet     File size : 299 kB

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Datasheet text preview:
CXK5V16100TM -85LLX/10LLX
65536-word × 16-bit High Speed CMOS Static RAM For the availability of this product, please contact the sales office.
Description CXK5V16100TM is a general purpose high speed CMOS static RAM organized as 65536-words by 16-bits. Operating on a single 3.3V supply, this asynchronous IC is suitable for high speed and low power consumption applications where battery back up for nonvolatility is required. Features · Extended operating temperature range: ­25 to +85°C · Fast access time: (Access time) -85LLX 85ns (max.) -10LLX 100ns (max.) · Low power consumption operation: Standby / DC operation 1.7µW (typ.) / 3.3mW (typ.) · Single 3.3V supply: 3.3V±0.3V · Fully static memory: No clock or timing strobe required · Equal access and cycle time · Common data input and output: three state output · Directly LVTTL compatible: All inputs and outputs · Low voltage data retention: 2.0V (min.) · 400mil 44pin TSOP (type II) package Block Diagram
A1 A0 A7 A6 A5 A4 A3 A2 A15 A14 GND Vcc Memory Matrix 512 × 1024 Row Decoder Memory Matrix 512 × 1024 Vcc Buffer

44 pin TSOP (PIastic)

Function 65536-word × 16-bit static RAM Structure Silicon gate CMOS IC

GND

CE UB LB OE WE

Control I/O Gate Column Decoder Pre Decoder I/O Gate Column Decoder

A13 A12 A11 A10 A9 A8 I/O Buffer I/O Buffer Buffer

I/O1

I/O8

I/O9 I/O16

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

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E93869A57-PP

CXK5V16100TM

Pin Configuration (Top View)
A4 1 A3 2 A2 3 A1 4 A0 5 CE 6 I/O1 7 I/O2 8 I/O3 9 I/O4 10 Vcc 11 GND 12 I/O5 13 I/O6 14 I/O7 15 I/O8 16 WE 17 A15 18 A14 19 A13 20 A12 21 NC 22
44 A5 43 A6 42 A7 41 OE 40 UB 39 LB 38 I/O16 37 I/O15 36 I/O14 35 I/O13 34 GND 33 Vcc 32 I/O12 31 I/O11 30 I/O10 29 I/O9 28 NC 27 A8 26 A9 25 A10 24 A11 23 NC

Pin Description Symbol A0 to A15 I/O1 to I/O16 CE LB UB WE OE VCC GND NC Address input Data input/output Chip enable input Byte enable input (I/O1 to I/O8) Byte enable input (I/O9 to I/O16) Write enable input Output enable input +3.3V power supply Ground No connection Description

Absolute Maximum Ratings Item Supply voltage Input voltage Input and output voltage Allowable power dissipation Operating temperature Storage temperature Soldering temperature · time Symbol VCC VIN VI/O PD Topr Tstg Tsolder

(Ta = 25°C, GND = 0V) Rating ­0.5 to +4.6 ­0.5 to VCC + 0.5 ­0.5 to VCC + 0.5 0.7 ­25 to +85 ­55 to +150 235 · 10 Unit V V V W °C °C °C · s

VIN, VI/O = ­3.0V Min. for pulse width less than 50ns. Truth Table CE H OE × WE × LB × L L L H L H L L × L L H L L H × H × × H UB × L H L L H L × H I/O1 to I/O8 Not selected Read Read High-Z Write Write Not Write/Hi-Z High-Z High-Z I/O9 to I/O16 Not selected Read High-Z Read Write Not Write/Hi-Z Write High-Z High-Z Vcc Current ISB1, ISB2 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3 ICC1, ICC2, ICC3

×: "H" or "L"

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CXK5V16100TM

DC Recommended Operating Conditions Item Supply voltage Input high voltage Input low voltage Symbol VCC VIH VIL Min. 3.0 2.0 ­0.3

(Ta = ­25 to +85°C, GND = 0V) Typ. 3.3 -- -- Max. 3.6 VCC + 0.3 0.8 Unit V V V

VIL = ­3.0V Min. for pulse width less than 50ns.

Electrical Characteristics DC and operating characteristics Item Input leakage current Output leakage current Operating power supply current Symbol ILI Test condition VIN = GND to VCC CE = VIH or UB = VIH or LB = VIH or OE = VIH or WE = VIL VI/O = GND to VCC CE = VIL VIN = VIH or VIL IOUT = 0mA Min. cycle Duty = 100% IOUT = 0mA Cycle time 1µs Duty = 100% IOUT = 0mA CE 0.2V VIL 0.2V VIH VCC ­ 0.2V ­25 to +85°C ISB1 CE VCC ­ 0.2V ­25 to +70°C ­25 to +40°C +25°C ISB2 Output high voltage Output low voltage VOH VOL CE = VIH IOH = ­2.0mA IOL = 2.0mA 85LLX 10LLX (VCC = 3.3V ± 0.3V, GND = 0V, Ta = ­25 to +85°C) Min. ­1 Typ. -- Max. 1 Unit µA

ILO

­1

--

1

µA

ICC1

-- -- --

1 40 35

3 55 50

mA

ICC2 Average operating current ICC3

mA

--

10

20

mA

-- -- -- -- -- 2.4 --

-- -- -- 0.5 0.03 -- --

40 20 4 2 0.6 -- 0.4 mA V V µA

Standby current

VCC = 3.3V, Ta = 25°C

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CXK5V16100TM

I/O capacitance Item Input capacitance I/O capacitance Symbol Test conditions CIN CI/O VIN = 0V VI/O = 0V Min. -- --

(Ta = 25°C, f = 1MHz) Typ. -- -- Max. 8 10 Unit pF pF

Note) This parameter is sampled and is not 100% tested.

AC Characteristics · AC test conditions (VCC = 3.3V ± 0.3V, Ta = ­25 to +85°C) Item Input pulse high level Input pulse low level Input rise time Input fall time Input and output reference level Output load conditions 85ns 100ns Conditions VIH = 2.2V VIL = 0.6V
TTL

tr = 5ns tf = 5ns
1.4V CL = 30pF, 1TTL CL = 100pF, 1TTL

CL

CL includes scope and jig capacitances.

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CXK5V16100TM

· Read cycle (WE = "H") -85LLX Item Read cycle time Address access time Chip enable access time (CE) Byte enable access time (UB, LB) Output enable to output valid Output hold from address change Chip enable to output in low Z (CE) Ouput enable to output in low Z (OE) Byte enable to output in low Z (UB, LB) Chip disable to output in high Z (CE) Chip disable to output in high Z (OE) Byte disable to output in high Z (UB, LB) Symbol Min. 85 -- -- -- -- 10 10 5 5 -- -- -- Max. -- 85 85 40 40 -- -- -- -- 35 30 30 -10LLX Min. 100 -- -- -- -- 10 10 5 5 -- -- -- Max. -- 100 100 50 50 -- -- -- -- 40 35 35 ns ns ns ns ns ns ns ns ns ns ns ns Unit

tRC tAA tCO tBO tOE tOH tLZ tOLZ tBLZ tHZ tOHZ tBHZ

tHZ, tOHZ and tBHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage levels. · Write cycle -85LLX Item Write cycle time Address valid to end of write Chip enable to end of write Byte enable to end of write Data to write time overlap Data hold from write time Write pulse width Address setup time Write recovery time (WE) Write recovery time (CE, UB, LB) Output active from end of write Write to output in high Z Symbol Min. 85 70 70 70 35 0 60 0 5 5 5 -- Max. -- -- -- -- -- -- -- -- -- -- -- 35 -10LLX Min. 100 80 80 80 40 0 70 0 5 5 5 -- Max. -- -- -- -- -- -- -- -- -- -- -- 40 ns ns ns ns ns ns ns ns ns ns ns ns Unit

tWC tAW tCW tBW tDW tDH tWP tAS tWR tWR1 tOW tWHZ

tWHZ is defined as the time required for outputs to turn to high impedance state and is not referred to as output voltage levels.

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