|
|
Part: ICX087AKB
Category:
Description: Diagonal 4.5mm(Type 1/4)CCD Image Sensor For Palcolor Video Cameras
Company: Sony Electronics
Datasheet: Download ICX087AKB datasheet File size : 421 kB
Request For quote: Find where to buy ICX087AKB
Datasheet text preview:
ICX087AKB
Diagonal 4.5mm (Type 1/4) CCD Image Sensor for PAL Color Video Cameras
For the availability of this product, please contact the sales office.
Description The ICX087AKB is an interline CCD solid-state image sensor suitable for PAL color video cameras. High sensitivity is achieved through the use of Ye, Cy, Mg, and G complementary color mosaic filters and through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip features a field period readout system and an electronic shutter with variable chargestorage time. Also, this outline is miniaturized by using original package. Features · Maximum package dimentions: 8mm · High sensitivity and low dark current · Horizontal register: 3.3 to 5.0V drive · No voltage adjustment (Reset gate and substrate bias are not adjusted.) · Low smear · Excellent antiblooming characteristics · Continuous variable-speed shutter · Ye, Cy, Mg, and G complementary color mosaic filters on chip Device Structure · Interline CCD image sensor · Image size: · Number of effective pixels: · Total number of pixels: · Chip size: · Unit cell size: · Optical black: · Number of dummy bits: · Substrate material:
V
13 pin PCA (Ceramic)
in 1 1
7 Pin 8 H
P
14
30
Optical black position (Top View)
Diagonal 4.5mm (Type 1/4) 500 (H) × 582 (V) approx. 290K pixels 537 (H) × 597 (V) approx. 320K pixels 4.47mm (H) × 3.80mm (V) 7.3µm (H) × 4.7µm (V) Horizontal (H) direction: Front 7 pixels, rear 30 pixels Vertical (V) direction: Front 14 pixels, rear 1 pixel Horizontal 16 Vertical 1 (even fields only) Silicon
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
1
E95807D99
ICX087AKB
Block Diagram and Pin Configuration (Top View)
VOUT G ND V1 V2 V3 NC V4
V4 V3 1 V2 3 V1 4 5 6 7 GND VOUT VDD 8 9 SUB 2 13 12 11 10 VL RG H2 H1
7
6
5
4
3
2
1
Cy
Ye G Ye Mg Ye G
Cy Mg Cy G Cy Mg
Ye G Ye Mg Ye G
Vertical Register
Mg Cy G Cy Mg
Note)
Horizontal Register Note) 8 9 10 11 12 13 : Photo sensor
NC
VDD
Pin Description Pin No. Symbol 1 2 3 4 5 6 7 V4 V3 V2 V1 NC GND VOUT GND Signal output Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Pin No. 8 9 10 11 12 13 Symbol VDD SUB VL RG H1 H2
SUB
H1
H2
VL
RG
Description Supply voltage Substrate clock Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock
Absolute Maximum Ratings Item Substrate clock SUB GND Supply voltage VDD, VOUT GND VDD, VOUT SUB V1, V2, V3, V4 GND V1, V2, V3, V4 SUB Ratings 0.3 to +40 0.3 to +18 30 to +9 15 to +16 to +10 to +15 to +16 16 to +16 10 to +15 55 to +10 65 to +0.3 0.3 to +27.5 0.3 to +20.5 0.3 to +17.5 30 to +80 10 to +60 Unit V V V V V V V V V V V V V V °C °C 1 Remarks
Clock input voltage
Voltage difference between vertical clock input pins Voltage difference between horizontal clock input pins H1, H2 V4 H1, H2 GND H1, H2 SUB VL SUB V1, V3, VDD, VOUT VL RG GND V2, V4, H1, H2, GND VL Storage temperature Operating temperature 1 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. 2
ICX087AKB
Bias Conditions Item Supply voltage Protective transistor bias Substrate clock Symbol VDD VL SUB Min. 14.55 Typ. 15.0 1 2 Max. 15.45 Unit V Remarks
1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. 2 Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Symbol IDD Min. Typ. 4 Max. 6 Unit mA Remarks
Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage VVH3 VVH VVH4 VVH VVHH VVHL VVLH VVLL Horizontal transfer clock voltage VH VHL VRG Reset gate clock voltage VRGLH VRGLL VRGH Substrate clock voltage VSUB VDD + VDD + 0.3 0.6 21.5 22.5 3.0 0.05 4.5 5.0 0 5.0 Min. 14.55 0.05 0.2 8.0 6.8 0.25 0.25 Typ. 15.0 0 0 7.5 7.5 Max. 15.45 0.05 0.05 7.0 8.05 0.1 0.1 0.3 0.3 0.3 0.3 5.25 0.05 5.5 0.8 VDD + 0.9 23.5 Unit V V V V V V V V V V V V V V V V V
Waveform diagram
Remarks
1 2 2 2 2 2 2 2 2 2 2 3 3 4 4 4 5 Input through 0.01µF capacitance Low-level coupling High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL3 + VVL4) / 2 VV = VVHn VVLn (n = 1 to 4) VVH = (VVH1 + VVH2) / 2
3
Others parts begin by ic
IC-1 IC-2 IC-3 IC-4 IC-5 IC-6 IC-7 IC-8 IC-9 IC-10 IC-11 IC-12 IC-13 IC-14 IC-15 IC-16 IC-17 IC-18 IC-19 IC-20 IC-21 IC-22 IC-23 IC-24 IC-25 IC-26 IC-27 IC-28
|
|
|
