Details, datasheet, quote on part number: 74AC10B
Part74AC10B
CategoryLogic => CMOS/BiCMOS->AC/ACT Family->Advanced High Speed CM
TitleCMOS/BiCMOS->AC/ACT Family->Advanced High Speed CM
DescriptionTriple 3-INPUT NAND Gate
CompanyST Microelectronics, Inc.
DatasheetDownload 74AC10B datasheet
Cross ref.Similar parts: 5962-8761001CA, SN74AC10N, 74AC10PC, CD74AC10E
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Features, Applications

HIGH SPEED: tPD = 4ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL 28 % VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 10 IMPROVED LATCH-UP IMMUNITY

DESCRIPTION The is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

PIN No SYMBOL to 3Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage

Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to VCC -0.5 to VCC +150 300 Unit mA C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.

Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC or 5.5V (note 1) Parameter Value 0 to VCC 0 to VCC 125 8 Unit V C ns/V

High Level Input Voltage Low Level Input Voltage High Level Output Voltage

1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50


 

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74AC10M
74AC10MTR
74AC10TTR
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