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Part: 74ACT161M
Category:
Logic
-> CMOS/BiCMOS->AC/ACT Family->Advanced High Speed CM
Description: Synchronous Presettable 4-BIT Counter
Company: ST Microelectronics, Inc.
Datasheet: Download 74ACT161M datasheet File size : 232 kB
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Datasheet text preview:
74ACT161
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
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HIGH SPEED: fM AX = 290MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: IC C = 8µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS V IH = 2V (MIN.), VIL = 0.8V (MAX.) 50 TRANSMISSION LINE DRIVING CAPABILITY SY MMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BA LANCE D PROPAGATION DELAYS: tPLH tPHL OPER ATING VOLTAGE RANGE: V C C (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 161 IMPROV ED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74ACT161B 74ACT161M T&R 74ACT161MTR 74ACT161TTR
DESCRIPTION The 74ACT161 is an advanced high-speed CMOS SYNCRONOUS PRESETTABLE COUNTER fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS tecnology. It is a 4 bit binary counter with Asynchronous Clear. The circuit have four fundamental modes of oper ation, in order of preference: synchronous reset, parallel load, count-up and hold. Four control inputs, (CLEAR), (LOAD), (PE) and (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and sets all outputs on LOW state. A LOW signal on LOAD overrides PIN CONNECTION AND IEC LOGIC SYMBOLS
counting and allows information on Parallel Data inputs to be loaded into the flip-flop on the next rising edge of CLOCK. With LOAD and CLEAR HIGH, PE and TE permit counting when both are HIGH. Conversely, a LOW signal on either PE and TE inhibits counting. The CARRY OUTPUT is HIGH when TE is HIGH and counter is in state 15. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
April 2001
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74ACT161
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2 3, 4, 5, 6 7 10 9 14, 13, 12, 11 15 8 16 SYMBOL CLEAR CLOCK A, B, C, D PE TE LOAD QA toQD NAME QND FUNCTION Master Reset Clock Input (LOW to HIGH Edge Trigger) Data Inputs Count Enable Input Count Enable Carry Input Parallel Enable Input Flip-Flop Outputs
CAR RY OUT Terminal Count Output G ND Ground (0V) V CC Positive Supply Voltage
TRUTH TABLE
INPUTS CLEAR L H H H H H L O AD X L H H H X PE X X X L H X TE X X L X H X CLOCK X L A L B L C L D RESET TO "0" PRESET DATA NO COUNT NO COUNT COUNT NO COUNT OUTPUTS F UNCT IO N
NO CHANGE NO CHANGE COUNT UP NO CHANGE
X : Don't Care; A, B, C, D; Logic level of data input; CARRY OUT : TE x QA x QB x QC x QD
LOGIC DIAGRAM
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74ACT161
TIMIN G CHART
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74ACT161
ABSOLU TE MAXIMUM RATINGS
Sy mbol V CC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 300 -65 to +150 300 Unit V V V mA mA mA mA °C °C
ICC or IGND DC VCC or Ground Current
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
Sy mbol V CC VI VO Top dt/d v Supply Voltage Input Voltage Out put Voltage Operat ing Temperature Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1) Parameter Value 4.5 to 5.5 0 to VCC 0 to VCC -55 to 125 6 Unit V V V °C ns/V
1) VIN from 0.8V to 2.0V
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74ACT161
DC SPECIFICATIONS
Test Condition Symbol Parameter V CC (V) 4. 5 5. 5 4. 5 5. 5 4. 5 5. 5 4. 5 5. 5 VOL Low Level Output Voltage 4. 5 5. 5 4. 5 5. 5 II ICCT ICC IOLD IOHD Input Leakage Current Max ICC/Inpu t Quiescent Supply Current Dynamic Output Current (note 1, 2) 5. 5 5. 5 5. 5 5. 5 VO = 0.1 V or VCC-0.1V VO = 0.1 V or VCC-0.1V IO=-50 µA IO=-50 µA IO=-24 mA IO=-24 mA IO=50 µA IO=50 µA IO=24 mA IO=24 mA VI = VCC or GND VI = VCC - 2.1V VI = VCC or GND VOLD = 1.65 V max VOHD = 3.85 V min 0.6 8 4.4 5.4 3.86 4.86 0.001 0.001 0.1 0.1 0.36 0.36 ± 0.1 TA = 25°C Min. 2.0 2 .0 Typ. 1.5 1.5 1.5 1.5 4.49 5.49 Max. Value -40 to 85°C Min. 2.0 2.0 0.8 0 .8 4.4 5.4 3.76 4.76 0.1 0.1 0. 44 0. 44 ±1 1.5 80 75 -75 0.8 0 .8 4.4 5.4 3.7 4.7 0.1 0.1 0.5 0.5 ±1 1.6 1 60 50 -50 µA mA µA mA mA V Max. -55 to 125°C Min. 2.0 2.0 0.8 0 .8 V Max. V Unit
VIH VIL VOH
Hig h Level Input Voltage Low Level Input Voltage High Level Output Voltage
1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
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