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Details, datasheet, quote on part number:74ALVCH162374
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| Part: | 74ALVCH162374 |
| Category: | Logic => HCMOS->ALVC->Advanced Low Voltage HCMOS |
| Description: | Low Voltage CMOS 16-BIT D-type Flip Flop (3-STATE) With 3.6V Tolerant Inputs And Outputs |
| Company: | ST Microelectronics, Inc. |
| Datasheet: | Download 74ALVCH162374 datasheet File size : 243 kB |
| Request For quote: | Find where to buy 74ALVCH162374
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Datasheet text preview:
74ALVCH162374
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
s s
s
s
s s s
s
s
s
3.6V TOLERANT INPUTS AND OUTPUTS H IGH SPEED : tPD = 4.6 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 5.4 ns (MAX.) at VCC = 2.3 to 2.7V tPD = 6.5 ns (MAX.) at VCC = 1.65V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPED ANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3.0V |IOH| = IOL = 18mA (MIN) at VCC = 2.3V |IOH| = IOL = 4mA (MIN) at VCC = 1.65V BUS HOLD PROVIDED ON DATA INPUTS 26 SERIE RESISTORS IN OUTPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V PIN AND FUN CTION COMPATIBLE WITH 74 SERIES 16374 LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: H BM > 2000V (MIL STD 883 method 3015); M M > 20 0V
TSSOP
O RDE R CO DE S
PACKAGE TSSOP TUBE T&R 74ALVCH162374T
PIN CONNECTION
DESCRIPTION The 74ALVCH162374 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVER TING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both i nput s and out put s . These flip-flops are controlled by two clock inputs (nCK) and two output enable inputs (nOE). On the positive transition of the (nCK), the nQ outputs will be set to the logic state that were s et up at t he nD i nput s . W hile the (nOE) input is low, the outputs (nQ) will be in a normal state (HIGH or LOW logic level) and while high level the outputs will be in a high impedance state. Any output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are off.The device circuits is including 26 series resistance in the outputs. These resistors permit to reduce line noise in high speed applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
October 2002 1/10
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
74ALVCH162374
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No 1 SYMBOL 1OE NAME AND FUNCTION
IEC LOGIC SYMBOLS
3 State Output Enable Input (Active LOW) 2, 3, 5, 6, 8, 9, 1Q0 to 1Q7 3-State Outputs 11, 12 13, 14, 16, 17, 2Q0 to 2Q7 3-State Outputs 19, 20, 22, 23 24 2OE 3 State Output Enable Input (Active LOW) 25 2CK Clock Input 36, 35, 33, 32, 2D0 to 2D7 Data Inputs 30, 29, 27, 26 47, 46, 44, 43, 1D0 to 1D7 Data Inputs 41, 40, 38, 37 48 1CK Clock Input 4, 10, 15, 21, GND Ground (0V) 28, 34, 39, 45 7, 18, 31, 42 VCC Positive Supply Voltage
TRUTH TABLE
INPUTS OE H L L L
X : Don`t Care Z : High Impedance
OUTPUT D X X L H Q Z NO CHANGE L H
CK X
2/10
74ALVCH162374
LOGIC DIAGRAM
AB SOLUTE MAXIMUM RATINGS
Symbol VCC VI VO VO IIK IOK IO PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage (OFF State) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 - 50 - 50 ± 50 ± 100 400 -65 to +150 300 Unit V V V V mA mA mA mA mW °C °C
ICC or IGND DC VCC or Ground Current per Supply Pin
Absolute Maximum Ratings are those values beyond which damage to the device may occur. F unctional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO VCC
RECOMMENDED OPERA TING CONDITIONS
Symbol VCC VI VO VO IOH, IOL IOH, IOL IOH, IOL Top dt/dv Supply Voltage Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.3 to 2.7V) High or Low Level Output Current (VCC = 1.65V) Operating Temperature Input Rise and Fall Time (note 1) Parameter Value 1.65 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC ± 12 ±6 ±2 -55 to 125 0 to 10 Unit V V V V mA mA mA °C ns/V
1) VIN from 0.8V to 2V at VCC = 3.0V
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74ALVCH162374
DC SPEC IFICATIONS
Test Condition Symbol Parameter VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 3.0 V OL Low Level Output Voltage 1.65 to 3.6 1.65 2.3 2.3 2.7 3.0 II IIHOLD Input Leakage Current Bus Hold Input Leakage Current 3.6 1.65 1.65 2.3 2.3 3.0 3.0 3.6 Ioff IOZ Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 0 3.6 IO=-100 µA IO=-2 mA IO=-4 mA IO=-6 mA IO=-8 mA IO=-6 mA IO=-12 mA IO=100 µA IO=2 mA IO=4 mA IO=6 mA IO=8 mA IO=12 mA VI = 0 or 3.6V VI =0.58 V VI =1.07 V VI =0.7 V VI =1.7 V VI =0.8 V VI =2 V VI = 0 to 3.6 V VI or VO = 3.6V VI = VIH or VIL VO = 0 to VCC VI = VCC or GND IO= 0 VIH = VCC - 0.6V + 25 - 25 + 45 - 45 + 75 - 75 ± 5 00 10 ±5 -40 to 85 °C Min. 0.65 Vcc 1.7 2.0 0.35 Vcc 0.7 0.8 VCC-0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.55 0.6 0.8 ±5 + 25 - 25 + 45 - 45 + 75 - 75 ± 5 00 20 ± 10 µA µA µA µA µA VCC-0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.55 0.6 0.8 ±5 µA V V Max. Value -55 to 125 °C Min. 0.65 Vcc 1.7 2.0 0.35 Vcc 0.7 0.8 Max. Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
VIL
V
VOH
ICC ICC
3.6 3.0 to 3.6
20 500
40 750
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74ALVCH162374
AC ELECTRICAL C HARACTERISTICS
Test Condition Symbol Parameter VCC (V) CL (pF) 30 30 50 50 30 30 50 50 30 30 50 50 30 30 50 50 30 30 50 50 30 30 50 50 30 30 50 50 RL () 1000 500 500 500 1000 500 500 500 1000 500 500 500 1000 500 500 500 1000 500 500 500 1000 500 500 500 1000 500 500 500 ts = tr (ns) 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 -40 to 85 °C Min. 1 1 1 1 1 1 1 1 1 1 1 1 2.1 2.1 2.2 1.9 0.8 0.6 0.5 0.5 4 3.3 3.3 3.3 120 150 200 300 Max. 6.5 5.4 5.4 4.6 8.0 6.5 6.4 5.2 6.8 5.6 5 4.5 Value -55 to 125 °C Min. 1 1 1 1 1 1 1 1 1 1 1 1 2.1 2.1 2.2 1.9 0.8 0.6 0.5 0.5 4 3.3 3.3 3.3 120 150 200 300 Max. 6.5 5.4 5.4 4.6 8.0 6.5 6.4 5.2 6.8 5.6 4.5 4.5 Unit
tPLH tPHL Propagation Delay Time CK to Qn
1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPZL tPZH Output Enable Time 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 tPLZ tPHZ Output Disable Time 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 ts Setup TIme, HIGH or 1.65 to 1.95 LOW level Dn to CK 2.3 to 2.7 2.7 3.0 to 3.6 th Hold Time High or 1.65 to 1.95 LOW level Dn to CK 2.3 to 2.7 2.7 3.0 to 3.6 tw CK Pulse Width, 1.65 to 1.95 HIGH 2.3 to 2.7 2.7 3.0 to 3.6 fMAX Maximum Clock 1.65 to 1.95 Pulse Frequency 2.3 to 2.7 2.7 3.0 to 3.6
ns
ns
ns
ns
ns
ns
MHz
5/10
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