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Details, datasheet, quote on part number:74LCX138TTR
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| Part: | 74LCX138TTR |
| Category: | Logic => LCX->Low Voltage HCMOS, 5V I/O Tolerant |
| Description: | Low Voltage CMOS 3 to 8 Line Decoder (INV.) With 5V Tolerant Inputs |
| Company: | ST Microelectronics, Inc. |
| Datasheet: | Download 74LCX138TTR datasheet File size : 258 kB |
| Request For quote: | Find where to buy 74LCX138TTR
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Datasheet text preview:
74LCX138
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.) WITH 5V TOLERANT INPUTS
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5V TOLERANT INPUTS H IGH SPEED : tPD = 6.7ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
SOP
TSSOP
ORDER CODES
PACKAGE SOP TSSOP TUBE 74LCX138M T&R 74LCX138MTR 74LCX138TTR
DESCRIPTION The 74LCX138 is a low voltage CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will PIN CONNECTION AND IEC LOGIC SYMBOLS
go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is ihnibited and all the 8 outputs go to high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
September 2001
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74LCX138
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 SYMBOL A, B, C G2A, G2B G1 Y0 to Y7 GND VCC NAME AND FUNCTION Address Inputs Enable Inputs Enable Input Outputs Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUTS OUTPUTS ENABLE G2B X X H L L L L L L L L G2A X H X L L L L L L L L G1 L X X H H H H H H H H C X X X L L L L H H H H SELECT B X X X L L H H L L H H A X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L
X : Don't Care
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74LCX138
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
AB SOLUTE MAXIMUM RATINGS
Symbol V CC VI VO VO IIK IOK IO ICC IGND Tstg TL Supply Voltage DC Input Voltage DC Output Voltage (VCC = 0V) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current DC Supply Current per Supply Pin DC Ground Current per Supply Pin Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 50 - 50 ± 50 ± 100 ± 100 -65 to +150 300 Unit V V V V mA mA mA mA mA °C °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND
RECOMMENDED OPERATING CONDITIONS
Symbol V CC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage (VCC = 0V) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.7V) Operating Temperature Input Rise and Fall Time (note 2) Parameter Value 2.0 to 3.6 0 to 5.5 0 to 5.5 0 to VCC ± 24 ± 12 -55 to 125 0 to 10 Unit V V V V mA mA °C ns/V
1) Truth Table guaranteed: 1.5V to 3.6V 2) VIN from 0.8V to 2V at VCC = 3.0V
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74LCX138
DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) -40 to 85 °C Min. 2.0 2.7 to 3.6 0.8 2.7 to 3.6 2.7 3.0 VOL Low Level Output Voltage 2.7 to 3.6 2.7 3.0 II Ioff IC C ICC Input Leakage Current Power Off Leakage Current Quiescent Supply Current ICC incr. per Input 2.7 to 3.6 0 2.7 to 3.6 2.7 to 3.6 IO=-100 µA IO=-12 mA IO=-18 mA IO=-24 mA IO=100 µA IO=12 mA IO=16 mA IO=24 mA VI = 0 to 5.5V VI or VO = 5.5V VI = VCC or GND VI or VO= 3.6 to 5.5V VIH = VCC - 0.6V VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 ±5 10 10 ± 10 500 VCC-0.2 2.2 2.4 2.2 0.2 0.4 0.4 0.55 ±5 10 10 ± 10 500 µA µA µA µA V V 0.8 V Max. Value -55 to 125 °C Min. 2.0 Max. V Unit
VIH VIL VO H
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition Symbol Parameter VC C (V) 3.3 CL = 50pF VIL = 0V, VIH = 3.3V Value TA = 25 °C Min. Typ. 0.8 -0.8 Max. V Unit
VOLP VOLV
Dynamic Low Level Quiet Output (note 1)
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.
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74LCX138
AC ELECTRICAL CHARACTERISTICS
Test Condition Symbol Parameter VC C (V) 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 3.0 to 3.6 CL (pF) 50 50 50 50 RL () 500 500 500 500 ts = t r (ns) 2.5 2.5 2.5 2.5 -40 to 85 °C Min. 1.5 1.5 1.5 Max. 7.9 6.7 6.4 5.8 7.4 6.5 1.0 Value -55 to 125 °C Min. 1.5 1.5 1.5 Max. 7.9 6.7 6.4 5.8 7.4 6.5 1.0 ns ns ns ns Unit
tPLH tPHL tPLH tPHL tPLH tPHL tOSLH tOSHL
Propagation Delay Time A, B, C to Y Propagation Delay Time G1 to Y Propagation Delay Time G2 to Y Output To Output Skew Time (note1, 2)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - t PLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design
CA PACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VC C (V) 3.3 3.3 VIN = 0 to VCC fIN = 10MHz VIN = 0 or VCC Value TA = 25 °C Min. Typ. 6 42 Max. pF pF Unit
CIN CPD
Input Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
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