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Part: 74LVQ241M
Category:
Logic
-> LVQ->HCMOS->Low Voltage
Description: Low Voltage Octal Bus Buffer With 3 State Outputs (NON INVERTED)
Company: ST Microelectronics, Inc.
Datasheet: Download 74LVQ241M datasheet File size : 143 kB
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Datasheet text preview:
74LVQ241
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
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H IGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3 V C OMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 241 IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
ORDER CODES
PACKAGE SOP TSSOP TUBE 74LVQ241M T&R 74LVQ241MTR 74LVQ241TTR
DESCRIPTION The 74LVQ241 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and low noise 3.3V applications. 1G and 2G output control governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
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74LVQ241
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2, 4, 6, 8 9, 7, 5, 3 11, 13, 15, 17 18, 16, 14, 12 19 10 20 SYMBOL 1G 1A1 to 1A4 2Y1 to 2Y4 2A1 to 2A4 1Y1 to 1Y4 2G GND V CC NAME AND FUNCTION Output Enable Input Data Inputs Data Outputs Data Inputs Data Outputs Output Enable Input Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUTS 1G L L H
X : Don`t Care Z : High Impedance
OUTPUT 1An L H X 1Yn L H Z 2G H H L
INPUTS 2An L H X
OUTPUT 2Yn L H Z
ABSOLUTE MAXIMUM RATINGS
Symbol V CC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ±400 -65 to +150 300 Unit V V V mA mA mA mA °C °C
ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
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74LVQ241
RECOMMENDED OPERATING CONDITIONS
Symbol V CC VI VO Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 3.0V (note 2) Parameter Value 2 to 3.6 0 to VCC 0 to VCC -55 to 125 0 to 10 Unit V V V °C ns/V
1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V
DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) TA = 25°C Min. 2.0 0.8 IO=-50 µA 3.0 IO=-12 mA IO=-24 mA VOL Low Level Output Voltage IO=50 µA 3.0 IO=12 mA IO=24 mA II IOZ Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 3.6 3.6 3.6 3.6 VI = VCC or GND VI = VIH or VIL VO = VCC or GND VI = VCC or GND VOLD = 0.8 V max VOHD = 2 V min ± 0.1 ± 0.5 4 36 -25 0.002 0 0.1 0.36 2.9 2.58 2.99 2.9 2.48 2.2 0.1 0.44 0.55 ±1 ±5 40 25 -25 Typ. Max. Value -40 to 85°C Min. 2.0 0.8 2.9 2.48 2.2 0.1 0.44 0.55 ±1 ± 10 40 µA µA µA mA mA V V Max. -55 to 125°C Min. 2.0 0.8 Max. V V Unit
VIH VIL VOH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
3.0 to 3.6
ICC IOLD IOHD
1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 75
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74LVQ241
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 3.3 3.3 CL = 50 pF 3.3 0.8 V TA = 25°C Min. Typ. 0.4 -0.8 2 -0.5 Max. 0.8 V V Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. Unit
VOLP VOLV VIHD
VILD
Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3)
1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = tf = 3ns)
Test Condition Symbol Parameter VCC (V) 2.7 3.3 2.7 3.3 2.7 3.3 2.7 3.3
(*)
Value TA = 25°C Min. . Typ. 6.6 5.5 8.3 6.8 7.5 5.8 0.5 0.5 Max. 11 9 13.5 10 12 9.0 1.0 1.0 -40 to 85°C Min. Max. 12.5 9.5 18 11.5 13.5 10.5 1.0 1.0 -55 to 125°C Min. Max. 14 11 18 13 15 12 1.0 1.0 ns ns ns Unit
tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time tOSLH tOSHL Output To Output Skew Time (note1, 2)
(*)
(*)
(*)
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, t OSHL = |tPHLm - t PHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V
CA PACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 3.3 3.3 3.3 fIN = 10MHz TA = 25°C Min. Typ. 4 8 10 Max. Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. pF pF pF Unit
CIN CO U T CPD
Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x f IN + ICC/8 (per circuit)
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74LVQ241
TEST CIRCUIT
TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ
CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
SWITCH Open 2VCC Open
W AVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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