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Part: 74LVX16240
Category:
Logic
-> LVX->HCMOS, 5V Input Tolerant->Low Voltage, Low No
Description: 16-BIT Bus Buffer With 3-STATE Outputs (INVERTED), 5V Tolerant Inputs
Company: ST Microelectronics, Inc.
Datasheet: Download 74LVX16240 datasheet File size : 110 kB
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Datasheet text preview:
74LVX16240
16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED), 5V TOLERANT INPUT
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H IGH SPEED: tPD = 5.3 ns (TYP.) at VCC = 3V 5V TOLERANT INPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C INPUT VOLTAGE LEVEL : VIL= 0.8, VIH=2V AT VCC=3V POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPED ANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) IMPROVED LATC H-U P IMMUNITY LOW NOISE: VOLP = 0.3V (TYP.) AT VCC=3V
TSSOP
O RDE R CO DE S
PACKAGE TSSOP TUBE T&R 74LVX16240TTR
PIN CONNECTION
DESCRIPTION The 74LVX16240 is an advanced high-speed CMOS 16-BIT BUS BU FFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Any nG output control governs four BUS BUFFERS. Output Enable inputs (nG) tied together give full 16 bit operation. W hen nG is LOW, the outputs are on. When nG is HIGH , the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
February 2003
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74LVX16240
INPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS
PIN DESCRIPTION
PIN No 1 2, 3, 5, 6 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1G 1Y1 to 1Y4 2Y1 to 2Y4 3Y1 to 3Y4 4Y1 to 4Y4 4G 3G 4A1 to 4A4 3A1 to 3A4 2A1 to 2A4 1A1 to 1A4 2G GND VC C NAME AND FUNCTION Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Output Enable Input Data Input Data Input Data Input Data Input Output Enable Input Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUTS G L L H
X : Don`t Care Z : High Impedance
OUTPUT An L H X Yn H L Z
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74LVX16240
AB SOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 75 -65 to +150 300 Unit V V V mA mA mA mA °C °C
ICC or IGND DC VCC or Ground Current
Absolute Maximum Ratings are those values beyond which damage to the device may occur. F unctional operation under these conditions is not implied
RECOMMENDED OPERA TING CONDITIONS
Symbol VCC VI VO Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 2) (VCC = 3.0) Parameter Value 2 to 3.6 0 to 5.5 0 to VCC -55 to 125 0 to 100 Unit V V V °C ns/V
1) Truth T able guaranteed: 1.2 to 3.6V 2) VIN from 0.8 to 2.0V
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74LVX16240
DC SPEC IFICATIONS
Test Condition Symbol Parameter V CC (V) 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 VOL Low Level Output Voltage 2.0 3.0 3.0 Ioz High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current 3.6 3.6 3.6 IO=-50 µA IO=-50 µA IO=-4 mA IO=50 µA IO=50 µA IO=4 m VI = VIH or VIL VO = VCC or GND VI = 5V or GND VI = VCC or GND TA = 25°C Min. 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.58 2.0 3.0 4.5 0.0 0.0 0.1 0.1 0.36 ±0.25 ± 0.1 4 1.9 2.9 2.48 0.1 0.1 0.44 ± 2.5 ±1 40 Typ. Max. Value -40 to 85°C Min. 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.4 0.1 0.1 0.55 ± 2.5 ±1 40 µA µA µA V Max. -55 to 125°C Min. 1.5 2.0 2.4 0.5 0.8 0.8 Max. V Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
VIL
V V
VOH
II ICC
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74LVX16240
AC ELECTRICAL C HARACTERISTICS (Input tr = tf = 3ns)
Test Condition Symbol Parameter V CC (V) 2.7 2.7 3.3(*) 3.3(*) t P ZL tPZH Output Enable Time 2.7 2.7 3.3 tPLZ tPHZ tOSLH tOSHL
(*)
Value TA = 25°C Min. Typ. 5.7 8.0 5.3 7.8 Max. 9.0 12.3 8.4 11.9 11.0 15.1 10.6 14.1 15.0 14.0 1.5 1.0 -40 to 85°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 10.5 14.0 10.0 13.5 13.5 16.5 12.5 16.0 16.5 16.0 1.5 1.0 -55 to 125°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 10.5 14.0 10.0 13.5 13.5 16.5 12.5 16.0 16.5 16.0 1.5 1.0 ns ns ns ns Unit
CL (pF) 15 50 15 50 15 50 15 50 50 50 50 50 RL = 1K R L = 1 K RL = 1K RL = 1K RL = 1K RL = 1K
tPLH tPHL
Propagation Delay Time
7.0 9.6 6.6 9.1 10.8 10.3
3.3(*) Output Disable Time Output to Output Skew time (note 1) 2.7 3.3(*) 3.3(*) 3.3(*)
(*) Voltage range is 3.3V ± 0.3V Note 1 : Parameter guaranteed by design. tsoLH = |tpLHm - tpLHn|, tsoHL = |tpHLm - tpHLn|
CA PACITIVE CHARA CTERISTICS
Test Condition Symbol Parameter Min. CIN C O UT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 6 8 20 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF pF Unit
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
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