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Part: 74V1T08C
Category: Logic -> Gates
Description: Single 2-input And Gate
Company: ST Microelectronics, Inc.
Datasheet: Download 74V1T08C datasheet File size : 110 kB
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74V1T08
SINGLE 2-INPUT AND GATE
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HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY
S (SOT23-5L)
C (SC-70)
ORDER CODE: 74V1T08S 74V1T08C The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
DESCRIPTION The 74V1T08 is an advanced high-speed CMOS SINGLE 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS t echnology.
PIN CONNECTION AND IEC L OGIC SYMBOLS
October 1999
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74V1T08
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
P I N No 1 2 4 3 5 S Y M B OL 1A 1B 1Y GND VCC NA M E AND F U NCT I O N D ata I nput D ata I nput D ata O utput Gr ound ( 0V ) Po si tive S upply Volta ge
TRUTH TABLE
A L L H H B L H L H Y L L L H
ABSOLUTE MAXIMUM RATINGS
S ym b o l VC C VI VO VO IIK IOK IO Tstg TL Su pply V o ltage D C Input Volta ge D C Outp ut Volt age (s ee note 1) D C Outp ut Volt age (s ee note 2) D C Input Diode Curre nt D C Outp ut Diode C urrent D C Outp ut Current St or age Tem perat ur e Lead T e mperat ure (10 s ec) P ara met er V al u e -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 260 Unit V V V V mA mA mA mA
o o
ICC or IGND D C VCC o r Gro und Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) VCC = 0V 2) High or Low State
RECOMMENDED OPERATING CONDITIONS
S ym b o l VC C VI VO VO Top dt/dv S upply Vo ltage I nput V oltage O ut put Volt age ( see note 1) O ut put Volt age ( see note 2) O perati ng T em peratur e I nput R is e a nd F all T im e (se e note 3) (V CC = 5.0 ± 0.5 V) P ara met er V al u e 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Uni t V V V V
o
C
ns/V
1) VCC = 0V 2) High or Low State 3)VIN from 0.8V to 2 V
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74V1T08
DC SPECIFICATIONS
S ymb o l P ara met er T est C o n d i t i o n s V CC ( V) VI H VIL VOH VOL II ICC ICC High Level In put Volt age Low Level I nput Volt age High Level Ou t put Volt age Low Level O utp ut Volt age Input L eakage Current Quiesce nt Su pply Current Additional W o rst C as e Supply Current Out put Leaka ge Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 0 to 5.5 5.5 5.5 I O = - 50 µ A IO=-8 m A I O= 50 µ A IO=8 mA VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND VOUT = 5.5V 0 4.4 3.94 0.0 0.1 0.36 ±0.1 1 1.35 4.5
o
V al u e T A = 25 C M in. 2 0.8 4.4 3.8 0.1 0.44 ±1.0 10 1.5 T yp . M ax . - 40 t o 85 C M in . 2 0.8 M ax .
o
Un i t
V V
V V µA µA mA
IOPD
0
0.5
5.0
µA
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
S ymb o l P ara met er T est Co n d i t i o n V C C ( *) CL (p F ) ( V) 5.0 5.0 15 50 V al u e T A = 25 o C M in. T yp . 4.7 5.5 M ax . 6.7 7.7 Un i t - 40 t o 85 o C M in . 1.0 1.0 M ax . 7.5 8.5
tPL H tPHL
Propagatio n Delay Tim e
ns
(*) Voltage range is 5V ± 0.5V
CAPACITIVE CHARACTERISTICS
S ymb o l P ara met er T est C o n d i t i o n s
o
V al u e T A = 25 C M in. T yp . 4 14 M ax . 10 - 40 t o 85 C M in . M ax . 10
o
Un i t
C IN CPD
Input C apacita nce Power D iss ipation Capacit ance (n ot e 1)
pF pF
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD · VCC · fIN + ICC
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74V1T08
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74V1T08
SOT23-5L MECHANICAL DATA
mm MIN. A A1 A2 b C D E E1 L e e1 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.35 0.95 1.9 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 0.0 35.4 13.7 3.5 110.2 102.3 59.0 13.7 37.4 74.8 mils TYP. MAX. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 21.6
DIM.
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