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Details, datasheet, quote on part number:74V1T126C
 
 
Part:74V1T126C
Category:Logic => Buffers/Inverters => 3-State
Description:Single Bus Buffer 3-state
Company:ST Microelectronics, Inc.
Datasheet:Download 74V1T126C datasheet   File size : 56 kB
Request For quote:  Find where to buy 74V1T126C
 



Datasheet text preview:
®

74V1T126
SINGLE BUS BUFFER (3-STATE)
PRELIMINAR Y D ATA

s s

s

s s

s

s

s

HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY

S (SOT23-5L)

C (SC-70)

ORDER CODE: 74V1T126S 74V1T126C 3-STATE control input G has to be set LOW t o place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

DESCRIPTION The 74V1T12 6 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS t echnology.

PIN CONNECTION AND IEC L OGIC SYMBOLS

October 1999

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74V1T126
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
P I N No 1 2 4 3 5 S Y M B OL 1G 1A 1Y GND VCC NA M E AND F U NCT I O N Ou tp ut E nable I nput D ata I nput D ata O utput Gr ound ( 0V ) Po si tive S upply Volta ge

TRUTH TABLE
A X L H
X: "H" or "L" Z: High Impedance

G L H H

Y Z L H

ABSOLUTE MAXIMUM RATINGS
S ym b o l VC C VI VO IIK IOK IO Tstg TL Su pply V o ltage D C Input Volta ge D C Outp ut Volt age D C Input Diode Curre nt D C Outp ut Diode C urrent D C Outp ut Current St or age Tem perat ur e Lead T e mperat ure (10 s ec) P ara met er V al u e -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 260 Unit V V V mA mA mA mA
o o

ICC or IGND D C VCC o r Gro und Current

C C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.

RECOMMENDED OPERATING CONDITIONS
S ym b o l VC C VI VO Top dt/dv S upply Vo ltage I nput V oltage O ut put Volt age O perati ng T em peratur e I nput R is e a nd F all T im e (se e note 1) (V CC = 5.0 ± 0.5 V) P ara met er V al u e 4.5 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Uni t V V V
o

C

ns/V

1) VIN from 0.8V to 2 V

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74V1T126
DC SPECIFICATIONS
S ymb o l P ara met er T est C o n d i t i o n s V CC ( V) VI H VIL VOH VOL IOZ High Level In put Volt age Low Level I nput Volt age High Level Ou t put Volt age Low Level O utp ut Volt age High Im pedance Out put Leaka ge Current Input L eakage Current Quiesce nt Su pply Current Additional W o rst C as e Supply Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5 .5 0 to 5.5 5.5 5.5 I O = - 50 µ A IO=-8 m A I O= 50 µ A IO=8 mA VI = VIH or VIL VO = VCC or GND VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND 4.4 3.94 0.0 0.1 0.36 ±0.25 4.5 M in. 2 0.8 4.4 3.8 0.1 0.44 ±2.5 T yp . V al u e T A = 25 o C M ax . - 40 t o 85 o C M in . 2 0.8 M ax . V V Un i t

V V µA

II ICC ICC

±0.1 1 1.35

±1.0 10 1.5

µA µA mA

AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
S ymb o l P ara met er T est Co n d i t i o n V C C ( *) ( V) tPL H tPHL tPLZ tPHZ tPZH tPZL Propagatio n Delay Tim e Out put Disable T ime Out put Enable T ime 5.0 5.0 5.0 5.0 5.0 5.0 CL (p F ) 15 50 15 50 15 50
o

V al u e T A = 25 C M i n . T yp . M ax . 3.8 5.3 4.6 6.1 3.6 5.1 5.5 7.5 6.8 8.8 5.1 7.1 - 40 t o 85 C M i n . M ax . 1.0 1.0 1.0 1.0 1.0 1.0 6.5 8.5 8.0 10.0 6.0 8.0
o

Un i t

ns ns ns

(*) Voltage range is 5V ± 0.5V

CAPACITIVE CHARACTERISTICS
S ymb o l P ara met er T est C o n d i t i o n s V al u e T A = 25 o C M in. C IN COUT CPD Input C apacita nce Out put Capac itance Power D iss ipation Capacit ance (n ot e 1) T yp . 4 10 14 M ax . 10 Un i t - 40 t o 85 o C M in . M ax . 10 pF pF pF

1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD · VCC · fIN + ICC

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74V1T126
TEST CIRCUIT

T EST tPLH , tPHL tPZL , tPL Z tPZH , tPHZ
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1K or equivalent RT = ZOUT of pulse generator (typically 50)

S W I T CH Open VCC GND

WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)

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74V1T126
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)

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