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Details, datasheet, quote on part number:74VHCT74A
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Datasheet text preview:
74VHCT74A
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
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H IGH SPEED: fMAX = 160 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C C OMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
ORDER CODES
PACKAGE SOP TSSOP TUBE 74VHCT74AM T&R 74VHCT74AMTR 74VHCT74ATTR
DESCRIPTION The 74VHCT74A is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS t ec hnol ogy . A signal on the D INPUT is transferred to the Q OUTPUT during the positive going transition of the clock pulse.
CLR and PR are independent of the clock and accomplished by a low setting on the appropriate i nput . Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2001
1/11
74VHCT74A
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 13 2, 12 3, 11 SYMBOL 1CLR, 2CLR 1D, 2D 1CK, 2CK NAME AND FUNCTION Asyncronous Reset Direct Input Data Inputs Clock Input (LOW to HIGH, Edge Triggered) Asyncronous Set - Direct Input True Flip-Flop Outputs Complement Flip-Flop Outputs Ground (0V) Positive Supply Voltage
4, 10 5, 9 6, 8 7 14
1PR, 2PR 1Q, 2Q 1Q, 2Q GND V CC
TRUTH TABLE
INPUTS CLR L H L H H H
X : Don't Care
OUTPUTS FUNCTION D X X X L H X CK X X X Q L H H L H Qn Q H L H H L Qn NO CHANGE CLEAR PRESET
PR H L L H H H
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
2/11
74VHCT74A
AB SOLUTE MAXIMUM RATINGS
Symbol V CC VI VO VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage (see note 1) DC Output Voltage (see note 2) DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 300 Unit V V V V mA mA mA mA °C °C
ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) VCC = 0V 2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol V CC VI VO VO Top dt/dv Supply Voltage Input Voltage Output Voltage (see note 1) Output Voltage (see note 2) Operating Temperature Input Rise and Fall Time (see note 3) (VCC = 5.0 ± 0.5V) Parameter Value 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 20 Unit V V V V °C ns/V
1) VCC = 0V 2) High or Low State 3) VIN from 0.8V to 2V
3/11
74VHCT74A
DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 0 to 5.5 5.5 5.5 0 IO=-50 µA IO=-8 mA IO=50 µA IO=8 mA VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND VOUT = 5.5V TA = 25°C Min. 2 0.8 4.4 3.94 0.0 0.1 0.36 ± 0.1 2 1.35 0.5 4.5 4.4 3.8 0.1 0.44 ± 1.0 20 1.5 5.0 Typ. Max. Value -40 to 85°C Min. 2 0.8 4.4 3.7 0.1 0.55 ± 1.0 20 1.5 5.0 Max. -55 to 125°C Min. 2 0.8 Max. V V V V µA µA mA µA Unit
VIH VIL VOH VOL II ICC
High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Output Leakage Current
IC C
IOPD
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
Test Condition Symbol Parameter VC C (V) 5.0(*) 5.0(*) 5.0(*) 5.0
(*)
Value TA = 25°C Min. Typ. 5.8 6.3 7.6 8.1 Max. 7.8 8.8 10.4 11.4 5.0 5.0 5.0 0.0 3.5 -40 to 85°C Min. 1.0 1.0 1.0 1.0 Max. 9.0 10.0 12.0 13.0 5.0 5.0 5.0 0.0 3.5 80 65 80 65 -55 to 125°C Min. 1.0 1.0 1.0 1.0 Max. 9.0 10.0 12.0 13.0 5.0 5.0 5.0 0.0 3.5 ns ns ns ns ns ns MHz ns Unit
CL (pF) 15 50 15 50
tPLH tPHL tPLH tPHL tW tW ts th tREM fMAX
Propagation Delay Time CK to Q or Q Propagation Delay Time PR or CLR to Q or Q CK Pulse Width HIGH or LOW PR or CLR Pulse Width LOW Setup Time D to CK HIGH or LOW Hold Time D to CK HIGH or LOW Removal Time PR or CLR to CK Maximum Clock Frequency
5.0(*) 5.0(*) 5.0(*) 5.0(*) 5.0(*) 5.0(*) 5.0(*) 15 50 100 80 160 140
(*) Voltage range is 5.0V ± 0.5V
4/11
74VHCT74A
CA PACITIVE CHARACTERISTICS
Test Condition Symbol Parameter Min. CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 6 21 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per gate)
TEST CIRCUIT
CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
5/11
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