|
Details, datasheet, quote on part number:ESDA6V1BC6
| |
Datasheet text preview:
®
ESDA6V1BC6
A.S.D.
Application Specific Discretes
QUAD BIDIRECTIONAL TRANSIL SUPPRESSOR FOR ESD PROTECTION
APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : COMPUTERS PRINTERS COMMUNICATION SYSTEMS VIDEO EQUIPMENT This device is particularly adapted to the protection of symmetrical signals.
s s s s
DESCRIPTION The ESDA6V1BC6 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients. The device is ideal for situations where board space is at a premium. FEATURES
s s
SOT23-6L (SC-74)
FUNCTIONAL DIAGRAM SOT23-6L
s
s
s
4 BIDIRECTIONAL TRANSIL FUNCTIONS ESD PROTECTION FOR DATA, SIGNAL AND VCC BUS STAND OFF VOLTAGE RANGE: ± 5 V MIN. LOW LEAKAGE CURRENT < 1 µA PEAK PULSE POWER ( 8/20 ) = 80W
1 2 3
6 5 4
BENEFITS
s
s
s
High ESD protection level : up to 25 kV High integration Suitable for high density boards
COMPLIES WITH THE FOLLOWING STANDARDS: - IEC61000-4-2: 15 kV (air discharge) 8 kV (contact discharge) - MIL STD 883C-Method 3015-6: class3 (human body model)
January 2002 - Ed: 1C
1/6
ESDA6V1BC6
1. ESD protection by ESDA6V1BC6 With the focus of lowering the operation levels, the problem of malfunction caused by the environment is critical. Electrostatic discharge (ESD) is a major cause of failure in electronic system. Transient Voltage Suppressors are an ideal choice for ESD protection and have proven capable in suppressing ESD events. They are capable of clamping the incoming transient to a low enough level such that damage to the protected semiconductor is prevented. Surface mount TVS arrays offer the best choice for minimal lead inductance. They serve as parallel protection elements, connected between the signal line to ground. As the transient rises above the operating voltage of the device, the TVS array becomes a low impedance path diverting the transient current to ground. Bidirectional protection for 0V biased signals.
DRIVER
CONNECTOR
The ESDA6V1BC6 array is the ideal product for use as board level protection of ESD sensitive semiconductor components. The tiny SOT23-6L package allows design flexibility in the design of "crowded" boards where the space saving is at a premium. This enables to shorten the routing and can contribute to improve ESD performance. 2. Circuit Board Layout Circuit board layout is a critical design step in the suppression of ESD induced transients. The following guidelines are recommended : The ESDA6V1BC6 should be placed as near as possible to the input terminals or connectors. Minimise the path length between the ESD suppressor and the protected device Minimise all conductive loops, including power and ground loops The ESD transient return path to ground should be kept as short as possible. Use ground planes whenever possible.
s s s s s
2/6
ESDA6V1BC6
ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C) Symbol VPP Test conditions ESD discharge - MIL STD 883C - Method 3015-6 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge Peak pulse power (8/20µs) Junction temperature Storage temperature range Lead solder temperature (10 second duration) Operating temperature range (note 1) Value 25 15 8 80 150 -55 to +150 260 -40 to +125 Unit kV
PPP Tj Tstg TL Top
W °C °C °C °C
Note 1: Variation of parameters is given by curves.
ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol VRM VBR VCL IRM IPP C Rd Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Capacitance Dynamic resistance
Rd
I
VBR VCL VRM I RM V
I PP
VBR Type min.
@
IR
IRM @ VRM max.
Rd typ. note 1
T max.
C typ. 0V bias
max.
V ESDA6V1BC6
Note 1 : Square pulse, Ipp = 3A, tp=2.5µs.
V 8
mA 1
µA 1
V 5
1.35
10 /°C 3
-4
pF 20
6.1
3/6
ESDA6V1BC6
Fig. 1: Peak power dissipation versus initial junction temperature.
Ppp[Tj initial]/Ppp[Tj initial=25°C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0
500
Fig. 2: Peak pulse power versus exponential pulse duration (Tj initial = 25 °C).
Ppp(W)
100
Tj initial(°C) 0 25 50 75 100 125 150 175
10 1
tp(µs) 10 100
Fig. 3: Clamping voltage versus peak pulse current (Tj initial = 25 °C). Rectangular waveform tp = 2.5 µs.
Ipp(A) 20.0 10.0
tp=2.5µs
Fig. 4: Capacitance versus reverse applied voltage (typical values).
C(pF) 22 21 20 19 18 17 16 15 14 13 12 11 10
F=1MHz Vosc=30mV
1.0
Vcl(V) 0.1 0 5 10 15 20 25 30 35 40
VR(V) 0 1 2 3 4 5 6 7 8
Fig. 5: Relative variation of leakage current versus junction temperature (typical values).
IR[Tj] / IR[Tj=25°C] 500 100
10
Tj(°C) 1 25 50 75 100 125 150
4/6
ESDA6V1BC6
ORDER CODE
ESDA
ESD ARRAY
6V1
B
C6
PACKAGE: C6: SOT23-6L (SC-74)
VBR min. Bidirectional
PACKAGE MECHANICAL DATA SOT23-6L
A
REF.
DIMENSIONS Millimeters Min. Typ. Max. Min. 1.45 0.035 0.10 0 1.30 0.035 0.50 0.0137 0.20 0.004 3.00 0.95 2.60 0.10 3.00 0.102 0.60 0.004 10° 0.11 0.0374 0.118 0.024 10° 1.75 0.059 Inches Typ. Max. 0.057 0.004 0.0512 0.02 0.008 0.118 0.0689
E
A2
A
e
D
0.90 0 0.90 0.35 0.09 2.80 1.50
A1
b
A2 b c D E e H
e
C
A1
H
L
L
FOOTPRINT
0.60 0.024
MARKING Type
1.20 0.047
Marking BS55
ESDA6V1BC6
Packaging: Standard packaging is tape and reel.
3.50 0.138 2.30 0.090 mm inch 1.10 0.043 0.95 0.037
5/6
|
|
