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Part: L6565D
Category:
Power Management
-> PWM Power Supply
Description: Quasi-resonant SMPS Controller
Company: ST Microelectronics, Inc.
Datasheet: Download L6565D datasheet File size : 401 kB
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Datasheet text preview:
L6565
QUASI-RESONANT SMPS CONTROLLER
QUASI-RESONANT (QR) ZERO-VOLTAGESWITCHING (ZVS) TOPOLOGY s LINE FEED FORWARD TO DELIVER CONSTANT POWER vs. MAINS CHANGE s FREQ UEN CY FOLDBACK FOR OPTIMUM STANDBY EFFICIENCY s PULSE-BY-PULSE & HICCUP-MODE OCP s ULT RA-LO W START-UP (< 70µA) AND QUIESCENT CURRENT (< 3.5mA) s DISABLE FUNCTION (ON/OFF CONTROL) s 1% PRECISION (@ T j = 25°C) INTERNAL REFERENCE VOLTAGE s ±40 0mA TOTEM POLE GATE DRIVER WITH UVLO PULL-DOWN s BLUE ANGEL, ENERGY STAR, ENERGY 2000 COMPLIANT APPLICATIONS s TV/MO NIT OR SMPS s AC-DC ADAPTERS/CHARGERS s DIGITAL CONSUMER s PRINT ERS, FAX MACHINES, PHOTOCOPIERS AND SCANNERS
s
DIP8(Minidip)
SO-8
ORDERING NUMBERS: L6565N L6565D
DESCRIPTION The L6565 is a current-mode primary controller IC, specifically designed to build offline Quasi-resonant ZVS (Zero Voltage Switching at switch turn-on) flyback converters. Quasi-resonant operation is achieved by means of a transformer demagnetization sensing input that triggers MOSFET's turn-on.
BLOCK DIAGRAM
CO MP 2 1 INV + 2.5V VOLTAG E REGULATOR 2V + + 5pF LINE VOLTAGE FEEDFO RWARD 40K 4 CS VFF 3
8 VCC 20V R1 + R2 VREF2 Blanking START UVLO S Q INTERNAL SUPPLY
Hiccup-mode OCP R Q
VCC
7 GD DRIVER Starter STOP
ZERO CURRENT DETECTOR
+
2.1V 1.6V BLANKING STARTER
-
Hiccup- mode OCP
DISABLE 6 GND
5 ZCD
January 2003
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L6565
DESCRIPTION (continued) Converter's power capability variations with the mains voltage are compensated by line voltage feedforward. At light load the device features a special function that automatically lowers the operating frequency still maintaining the operation as close to ZVS as possible. In addition to very low start-up and quiescent currents, this feature helps keep low the consumption from the mains at light load and be Blue Angel and Energy Star compliant. The IC includes also a disable function, an on-chip filter on current sense, an error amplifier with a precise reference voltage for primary regulation and an effective two-level overcurrent protection. PIN CONNECTION (Top view, Minidip and SO8)
INV COMP VFF CS
1 2 3 4
8 7 6 5
Vcc GD GN D ZCD
PIN DESCRIPTION
N° 1 Name INV Function Inver ting input of the error amplifier. The information on the output voltage is fed into the pin through either a resistor divider (primary regulation) or an optocoupler (secondary feedback). This pin can be grounded in some secondary feedback schemes (see pin 2). Output of the error amplifier. Typically, a compensation network is placed between this pin and the INV pin to achieve stability and good dynamic performance of the voltage control loop. With secondar y feedback, the pin can be also driven directly by an optocoupler to control PWM by modulating the current sunk from the pin (with the INV pin grounded). Line voltage feedforward. The information on the converter's input voltage is fed into the pin through a resistor divider and is used to change the setpoint of the pulse-by-pulse current limitation (the higher the voltage, the lower the setpoint). If this function is not desired the pin will be grounded and the current limitation setpoint will be maximum. Input to the PWM comparator. The primary current is sensed through a resistor, the resulting voltage is applied to this pin and compared with an internal reference to determine MOSFET's turn-off. The internal reference is clamped at a value, which defines the pulse-by-pulse current limitation setpoint, depending on the voltage at pin VFF. If the signal at the pin CS exceeds 2 V, the gate driver will be disabled (Hiccup-mode OCP). Transformer's demagnetization sensing input for Quasi-Resonant operation. Alternately, synchronization input for an external signal. A negative-going edge triggers MOSFET's turn-on. The trigger circuit is blanked for a minimum of 3.5 µs after MOSFET turn-off, for safe operation under short circuit conditions and frequency foldback. If the pin is grounded the IC will be disabled. Ground. Current return for both the signal part of the IC and the gate driver. Gate driver output. The totem pole output stage is able to drive power MOSFET's and IGBT's with a peak current of 400 mA (source and sink). Supply Voltage of both the signal part of the IC and the gate driver. An electrolytic capacitor is connected between this pin and ground. A resistor connected from this pin to the converter's input bulk capacitor will be typically used to start up the device.
2
COMP
3
VFF
4
CS
5
ZCD
6 7 8
GND GD Vcc
2/17
L 6565
THERMAL DATA
Symbol Rth j-amb Parameter Max. Thermal Resistance, Junction-to-ambient SO8 150 Minidip 100 Unit °C/W
ABSOLUTE MAXIMUM RATINGS
Symbol IVcc I GD INV, COMP, VFF, CS IZC D Ptot Tj Tstg Pin 8 7 ICC + IZ Output Totem Pole Peak Current (2 µs) Parameter Value 30 ±700 -0.3 to 7 50 (source) -10 (sink) (Minidip) (SO8) 1 0.65 -40 to 150 -55 to 150 Unit mA mA V mA W °C °C
1, 2, 3 4 Analog Inputs & Outputs 5 Zero Current Detector Power Dissipation @Tamb = 50°C Junction Temperature Operating range Storage Temperature
ELECTRICAL CHARACTERISTCS (Tj = -25 to 125°C, VCC = 12V, Co = 1nF; unless otherwise specified)
Symbol SUPPLY VOLTAGE Vcc VCCOn VCCOff Hys VZ Istar t-up Iq ICC Iq Iq IVFF VVFF K VINV Operating range Turn-on threshold Turn-off threshold Hysteresis Zener Voltage Star t-up Current Quiescent Current Operating Supply Current Quiescent Current Quiescent Current Input Bias Current Operating Range Gain Voltage Feedback Input Threshold Line Regulation IINV Input Bias Current VVFF = 1.5V, VCOMP = 4V Tamb = 25°C 12V VCCOff VVFF = 0 to 3 V 0 to 3 0.16 2.5 2.535 2.56 5 -1 mV µA V 1.6 1.4 After turn-on 10.3 12.5 8.7 3.65 18 13.5 9.5 4 20 45 2.3 3.5 18 14.5 10.3 4.3 22 70 3.5 5 3.5 2.1 -1 V V V V µA mA mA mA mA µA V Parameter Test Condition Min. Typ. Max. Unit
SUPPLY CURRENT
LINE FEEDFORWARD
ERROR AMPLIFIER
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