Details, datasheet, quote on part number: M27C160-100K6TR
CategoryMemory => EPROM => 8 Mb
Description16 Mbit 2mb x8 or 1mb X16 uv EPROM And OTP EPROM
CompanyST Microelectronics, Inc.
DatasheetDownload M27C160-100K6TR datasheet


Features, Applications


LOW POWER CONSUMPTION Active Current 8MHz Standby Current 100A

PROGRAMMING VOLTAGE: 0.25V PROGRAMMING TIME: 100s/byte (typical) ELECTRONIC SIGNATURE Manufacturer Code: 0020h Device Code: 00B1h

DESCRIPTION The a 16 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large data or program storage and is organised as either 2 Mbit words of 8 bit or 1 Mbit words of 16 bit. The pin-out is compatible with a 16 Mbit Mask ROM. The FDIP42W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. Table 1. Signal Names

E G BYTEVPP VCC VSS February 1999 Address Inputs Data Outputs Data Outputs Data Output / Address Input Chip Enable Output Enable Byte Mode / Program Supply Voltage Ground

A new pattern can then be written rapidly to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C160 is offered PDIP42, PLCC44 and SO44 packages. DEVICE OPERATION The operating modes of the M27C160 are listed in the Operating Modes Table. A single power supply is required in the read mode. All inputs are TTL compatible except for VPP and on A9 for the Electronic Signature. Read Mode The M27C160 has two organisations, Word-wide and Byte-wide. The organisation is selected by the signal level on the BYTEVPP pin. When BYTEVPP is at VIH the Word-wide organisation is selected and the Q15A1 pin is used for Q15 Data Output. When the BYTEVPP pin is at VIL the Byte-wide organisation is selected and the Q15A1 pin is used for the Address Input A1. When the memory is logically regarded as 16 bit wide, but read in the Byte-wide organisation, then with A1 at VIL the lower 8 bits of the 16 bit data are selected and with A1 at VIH the upper 8 bits of the 16 bit data are selected.

Symbol TA TBIAS TSTG VIO (2) VCC VA9 (2) VPP Parameter Ambient Operating Temperature (3) Temperature Under Bias Storage Temperature Input or Output Voltage (except A9) Supply Voltage A9 Voltage Program Supply Voltage Value to 14 Unit C

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 3. Depends on range.

Mode Read Word-wide Read Byte-wide Upper Read Byte-wide Lower Output Disable Program Verify Program Inhibit Standby Electronic Signature E VIL Pulse VIH VIL G VIL V IH VIL IH X VIL BYTEVPP V IH VIL ID Q0-Q7 Data Out Data Out Data Out Hi-Z Data In Data Out Hi-Z Codes Q8-Q14 Data Out Hi-Z Data In Data Out Hi-Z Codes Q15A1 Data Out VIH V IL Hi-Z Data In Data Out Hi-Z Code

Identifier Manufacturer's Code Device Code A0 VIL VIH 0 1 Hex Data 20h B1h

The M27C160 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be selected. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to

the output pins independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.


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