|Category||Memory => ROM => EEPROM => Parallel => 16 Kb|
|Description||Obsolete - 16 Kbit (2KB X8) Parallel EePROM With Software Data Protection|
|Company||ST Microelectronics, Inc.|
|Datasheet||Download M28C16B datasheet
|16 Kbit x 8) Parallel EEPROM With Software Data Protection
Fast Access Time: at VCC=5V Single Supply Voltage: 5.5 V for 3.6 V for M28CxxB-W
Low Power Consumption Fast BYTE and PAGE WRITE (up to 64 Bytes) VCC=2.7 V
Enhanced Write Detection and Monitoring: Data Polling Toggle Bit Page Load Timer Status
JEDEC Approved Bytewide Pin-Out Software Data Protection 100000 Erase/Write Cycles (minimum) Data Retention (minimum): 40 Years
DESCRIPTION The M28C16B and M28C17B devices consist of 2048x8 bits of low power, parallel EEPROM, fabricated with STMicroelectronics' proprietary single polysilicon CMOS technology. The devices offer fast access time, with low power dissipation, and require a single voltage supply.
Data Input / Output Write Enable Chip Enable Output Enable Ready/Busy (M28C17B only) Supply Voltage GroundThis is information on a product still in production but not recommended for new designs.
The M28C17B is like the M28C16B in every way, except that it has an extra ready/busy (RB) output. The device has been designed to offer a flexible microcontroller interface, featuring software handshaking, with Data Polling and Toggle Bit. The device supports a 64 byte Page Write operation. Software Data Protection (SDP) is also supported, using the standard JEDEC algorithm. SIGNAL DESCRIPTION The external connections to the device are summarized in Table 1, and their use in Table 3. Addresses (A0-A10). The address inputs are used to select one byte from the memory array during a read or write operation. Data In/Out (DQ0-DQ7). The contents of the data byte are written to, or read from, the memory array through the Data I/O pins. Chip Enable (E). The chip enable input must be held low to enable read and write operations. When Chip Enable is high, power consumption is reduced. Output Enable (G). The Output Enable input controls the data output buffers, and is used to initiate read operations. Write Enable (W). The Write Enable input controls whether the addressed location to be read, from or written to. Ready/Busy (RB). Ready/Busy (on the M28C17B only) is an open drain output that can be used to detect the end of the internal write cycle.
DEVICE OPERATION In order to prevent data corruption and inadvertent write operations, an internal VCC comparator inhibits the Write operations if the V CC voltage is lower than V WI (see Table 4A). Once the voltage applied on the VCC pin goes over the VWI threshold (V CC>VWI), write access to the memory is allowed after a time-out t PUW, as specified in Table 4A. Further protection against data corruption is offered by the E and W low pass filters: any glitch, on the E and W inputs, with a pulse width less than 10 ns (typical) is internally filtered out to prevent inadvertent write operations to the memory. Read The device is accessed like a static RAM. When E and G are low, and W is high, the contents of the addressed location are presented on the I/O pins. Otherwise, when either E is high, the I/O pins revert to their high impedance state. Write operations are initiated when both W and E are low and G is high. The device supports both W-controlled and E-controlled write cycles (as shown in Figure 11 and Figure 12). The address is latched during the falling edge or E (which ever occurs later) and the data is latched on the rising edge or E (which ever occurs first). After a delay, tWLQ5H, that cannot be shorter than the value specified in Table 10A, the internal write cycle starts. It continues, under internal timing control, until the write operation is complete. The commencement of this period can be detected by reading the Page Load Timer Status on DQ5. The
Symbol TA TSTG VCC VIO VI VESD Parameter Ambient Operating Temperature Storage Temperature Supply Voltage Input or Output Voltage Input Voltage Electrostatic Discharge Voltage (Human Body model) 2 Value 6.5 4000 Unit °C
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents. 3015.7 (100 pF, 1500 )PAGE LOAD TIMER STATUS TOGGLE BIT DATA POLLING
|Related products with the same datasheet|
|Some Part number from the same manufacture ST Microelectronics, Inc.|
|M28C16B-W Obsolete - 16 Kbit (2KB X8) Parallel EePROM With Software Data Protection|
|M28C17 Obsolete - 16K (2K X 8) Parallel EePROM With Software Data Protection|
|M28C17-120K1T 16k 2k X 8 Parallel EePROM With Software Data Protection|
|M28C17-150 Obsolete - 16K (2K X 8) Parallel EePROM With Software Data Protection|
|M28C17-150K1T 16k 2k X 8 Parallel EePROM With Software Data Protection|
|M28C17-90 Obsolete - 16K (2K X 8) Parallel EePROM With Software Data Protection|
|M28C17-90K1T 16k 2k X 8 Parallel EePROM With Software Data Protection|
|M28C17A Obsolete - 16K (2K X8) Parallel EePROM|
|M28C17B Obsolete - 16 Kbit (2KB X8) Parallel EePROM With Software Data Protection|
|M28C64 Obsolete - 64K (8K X 8) Parallel EePROM With Software Data Protection|
|M28C64-12BS1T 64 Kbit 8k X 8 Parallel EePROM With Software Data Protection|
|M28C64-15-6 Obsolete - 64K (8K X 8) Parallel EePROM With Software Data Protection|
L7824ACV : Precision 1A Regulators
TDE1607DP : Interface Circuit - Relay And Lamp-driver
LIS244ALH : Motion Sensors (MEMS) MEMS inertial sensor high performance 2-axis ± 2/± 6g ultracompact linear accelerometer
LRIS2K-A6S2U : Memory TAG IC, 64 bit UID, 2048 bit Eeprom with Password 13.56mhz, Iso15693 and Iso18000-3 Mode 1 Compliant
STM1404AROHQ6F : 3 V Fips-140 Security Supervisor with Battery Switchover
M74HC365_01 : HEX BUS Buffer 3-state Hc367 NON Inverting, Hc368 Inverting
M24C32WCS3TG : 128 Kbit, 64 Kbit and 32 Kbit Serial I©÷C bus Eeprom
VN02N-E : Pmic - Mosfet, Bridge Driver - Internal Switch Integrated Circuit (ics) Through Hole Tube - 7 V ~ 26 V; IC SSR HI SIDE 60V PENTAWATT VRT Specifications: Package / Case: Pentawatt-5 (Vertical, Bent and Staggered Leads) ; Mounting Type: Through Hole ; Type: High Side ; Voltage - Supply: 7 V ~ 26 V ; On-State Resistance: 400 mOhm ; Current - Output / Channel: - ; Current - Peak Output: 6A ; Packaging: Tube ; Input Type: Non-Inverting ;
M93C56-WDW7P : 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 Specifications: Density: 2 kbits ; Number of Words: 128 k ; Bits per Word: 16 bits ; Bus Type: Serial ; Production Status: Full Production ; Data Rate: 2 MHz ; Logic Family: CMOS ; Supply Voltage: 5V ; Package Type: 3 X 3 MM, TSSOP-8, TSSOP ; Pins: 8 ; Operating Range: AUTOMOTIVE ; Operating Tempera
ST72P361AR7T6XXX : 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 Specifications: Life Cycle Stage: ACTIVE ; Clock Speed: 16 MHz ; ROM Type: Flash ; Supply Voltage: 4.5 to 5.5 volts ; I/O Ports: 48 ; Package Type: TQFP, Other, 10 X 10 MM, ROHS COMPLIANT, PLASTIC, TQFP-64 ; Operating Range: Industrial ; Pin Count: 64 ; Operating Temperature: -40 to 85 C (-40 to 185
STM32F405RGT6XXX : RISC MICROCONTROLLER Specifications: Life Cycle Stage: ACTIVE
24CO04B-IP : 4k/8k 2.5v i 2 C Serial EePROMs. Single supply with operation down to 2.5V Low power CMOS technology 1 mA active current typical 10 µA standby current typical 5 µA standby current typical at 3.0V Organized as two or four blocks of 256 bytes x 8) and 8) 2-wire serial interface bus, I2CTM compatible Schmitt trigger, filtered inputs for noise suppression Output slope control to eliminate.
A42U0616 : DRAM Sdram Sgram 16Mb X16. Document Title X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE Revision History n Organization: 1,048,576 words X 16 bits n Part Identification A42U0616 (1K Ref.) n Single 2.5V power supply/built-in VBB generator n Low power consumption - Operating: 120mA (-50 max) - Standby: 1mA (TTL), 0.2mA (CMOS), 250µA (Self-refresh current) n High speed 50/60/80 ns RAS access.
BS62LV1029 : Asynchronous 1M(128Kx8) Bits Static RAM. Vcc operation voltage ~ 5.5V Very low power consumption : Vcc = 5.0V C-grade 46mA (@55ns) operating current I- grade 47mA (@55ns) operating current C-grade 38mA (@70ns) operating current I- grade 39mA (@70ns) operating current 0.6uA (Typ.) CMOS standby current High speed access time -70 70ns Automatic power down when chip is deselected Three state outputs.
BS62LV2563 : SRAM. Wide Vcc operation voltage ~ 3.6V Very low power consumption : Vcc = 3.0V C-grade : 20mA (Max.) operating current I- grade : 25mA (Max.) operating current 0.01uA (Typ.) CMOS standby current High speed access time -70 70ns (Max.) at Vcc = 3.0V Automatic power down when chip is deselected Three state outputs and TTL compatible Fully static operation Data.
HY57V654020BLTC-10 : . The Hynix a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V654020B is organized HY57V654020B is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input.
IS41C16128 : EDO/FP. Extended Data-Out (EDO) Page Mode access cycle TTL compatible inputs and outputs Refresh Interval: 512 cycles/8 ms Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single ± 10% power supply Byte Write and Byte Read operation via two CAS Available in 40-pin SOJ and TSOP (Type II) Industrial temperature available The ISSI.
KM68FS8100FI : = KM68FS8100 1M X 8 Bit Super Low Power And Low Voltage Full CMOS Static RAM ;; Organization = 1Mx8 ;; Vcc(V) = 2.3~2.7 ;; Speed-tAA(ns) = 70,85 ;; Operating Temperature = i ;; Operating Current(mA) = 4 ;; Standby Current(uA) = 0.5 ;; Package = 48FBGA,TSOP ;; Production Status = Eol ;; Comments = -.
LH51BV1000J : CMOS 1m ( 128k X 8 ) Static RAM. Access time: 70 ns (MAX.) Current consumption: Operating: 30 mA (MAX.) 5 mA (MAX.) (tRC, tWC = 1 µs) Standby: 60 µA (MAX.) Data Retention: 1.0 µA (MAX.) (VCCDR = 25°C) Single power supply: 3.6 V Operating temperature: to +85°C Fully-static operation Three-state output Not designed or rated as radiation hardened Package: 10 mm CSP N-type bulk silicon.
MH16V725BWJ : FPM. Hyper Page Mode 1g (16mx72) DRAM. HYPER PAGE MODE 1207959552 - BIT 16777216 - WORD 72 - BIT ) DYNAMIC RAM PIN CONFIGURATION The x 72-bit dynamic ram module. This consist of eighteen industry standard x 4 dynamic RAMs in SOJ and one industry standard EEPROM in TSSOP. The mounting of SOJs and TSSOP on a card edge dual in-line package provides any application where high densities and large.
MX23L6415 : 64M, 8Mx8/4Mx16 90ns. Bit organization x 16 (word mode only) Fast access time - Random access:90ns(max.) Current - Standby:15uA(max.) Supply voltage - VCC 3.6V - VCCQ ~ 3.6V Package - 48 ball mini BGA X 9.0mm, ball pitch - 48 pin TSOP (Normal Type) Temperature -40~85° C Symbol A0~A21 D0~D15 CE# OE# VCC VCCQ GND NC Pin Function Address Inputs Data Outputs Chip Enable Input.
ST16600 : Memory Card. Smartcard MCU With 512 Bytes EePROM. 8 BIT ARCHITECTURE CPU 6 KBytes of USER ROM SECTOR COMBINATIVE 1 KByte of SYSTEM ROM 128 Bytes of RAM 512 Bytes of EEPROM, SECTOR COMBINATIVE Highly reliable CMOS EEPROM technology 10 year data retention 300,000 Erase/Write cycle endurance Protected One Time Programmable block or 64 bytes) to 16 bytes block either Erase or Write in single cycle.
TMS28F002AFT : ti TMS28F002AFT, 262 144 BY 8-Bit Auto-select Boot-block Flash Memory.
V436516Z04VATG-10PC : 3.3 Volt 16M X 64 High Performance PC100 Unbuffered Sdram Sodimm, 144 Pin Sodimm.
A82DL16x2 : A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, The A82DL16x2T(U) family consists of 16 megabit, 3.0 voltonly flash memory devices, organized as 1,048,576 words of 16 bits each or 2,097,152 bytes of 8 bits each. Word mode data appears on I/O0–I/O15; byte mode data appears on I/O0– I/O7. The device is designed to be programmed in-system.
K9K4G08Q0M-PCB00 : 512M X 8 FLASH 1.8V PROM, 30 ns, PDSO48. s: Memory Category: Flash, PROM ; Density: 4294967 kbits ; Number of Words: 512000 k ; Bits per Word: 8 bits ; Package Type: TSOP, 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48 ; Pins: 48 ; Logic Family: CMOS ; Supply Voltage: 1.8V ; Access Time: 30 ns ; Operating Temperature: 0 to 70 C (32 to 158 F).