|Description||Obsolete - 16K (2K X8) Parallel EePROM|
|Company||ST Microelectronics, Inc.|
|Datasheet||Download M28C17A-W datasheet
FAST ACCESS TIME: at 3V SINGLE SUPPLY VOLTAGE: ± 10% for M28C16A and to 3.6V for M28C16-xxW LOW POWER CONSUMPTION FAST WRITE CYCLE 32 Bytes Page Write Operation Byte or Page Write Cycle: 5ms ENHANCED END OF WRITE DETECTION Ready/Busy Open Drain Output Data Polling Toggle Bit PAGE LOAD TIMER STATUS BIT HIGH RELIABILITY SINGLE POLYSILICON, CMOS TECHNOLOGY Endurance >100,000 Erase/Write Cycles Data Retention >40 Years JEDEC APPROVED BYTEWIDE PIN OUT DESCRIPTION The M28C16A and 2K x8 low power Parallel EEPROM fabricatedwith STMicroelectronics proprietarysingle polysilicon CMOS technology. The device offers fast access time with low power dissipation and requires or 3V power supply. Table 1. Signal Names
G RB VCC VSS Address Input Data Input / Output Write Enable Chip Enable Output Enable Ready / Busy Supply Voltage GroundWarning: NC = Not Connected, DU = Don't Use. Note: 1. Pin 2 is either RB for or NC for M28C16A.
Symbol TA T STG VCC IO VI VESD Parameter Ambient Operating Temperature Storage Temperature Range Supply Voltage Input/Output Voltage Input Voltage Electrostatic Discharge Voltage (Human Body model)
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not i mplied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Depends on range.Mode Read Write Standby / Write Inhibit Write Inhibit Write Inhibit Output Disable
- DQ7 Data Out Data In Hi-Z Data Out or Hi-Z Data Out or Hi-Z
DESCRIPTION (cont'd) The circuit has been designed to offer a flexible microcontroller interface featuring both hardware and software handshakingmode with Ready/Busy, Data Polling and Toggle Bit. The M28C16A/17A supports 32 byte page write operation. PIN DESCRITPION Addresses (A0-A10). The address inputs select an 8-bit memory location during a read or write operation. Chip Enable (E). The chip enable input must be low to enable all read/write operations. When Chip Enable is high, power consumption is reduced. Output Enable (G). The Output Enable input controls the data output buffers and is used to initiate read operations. Data In/ Out - DQ7). Data is written to or read from the M28C16A/17A through the I/O pins.
Write Enable (W). The Write Enable input controls the writing of data to the M28C16A/17A. Ready/Busy (RB). Ready/Busy is an open drain output that can be used to detect the end of the internal write cycle. Ready/Busy is available for the M28C17A in PDIP, PLCC and SO packages, and for the M28C16A in TSOP only. OPERATION In order to prevent data corruption and inadvertent write operations during power-up, a Power On Reset (POR) circuit resets all internal programming cicuitry. Access to the memory in write mode is allowed after a power-up as specified in Table 7. Read The M28C16A/17Ais accessed like a static RAM. When E and G are low with W high, the data addressed is presented on the I/O pins. The I/O pins are high impedancewhen either E is high.
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