|Category||Memory => ROM => EEPROM => Parallel => 16 Kb|
|Description||Obsolete - 16 Kbit (2KB X8) Parallel EePROM With Software Data Protection|
|Company||ST Microelectronics, Inc.|
|Datasheet||Download M28C17B datasheet
|16 Kbit x 8) Parallel EEPROM With Software Data Protection
Fast Access Time: at VCC=5V Single Supply Voltage: 5.5 V for 3.6 V for M28CxxB-W
Low Power Consumption Fast BYTE and PAGE WRITE (up to 64 Bytes) VCC=2.7 V
Enhanced Write Detection and Monitoring: Data Polling Toggle Bit Page Load Timer Status
JEDEC Approved Bytewide Pin-Out Software Data Protection 100000 Erase/Write Cycles (minimum) Data Retention (minimum): 40 Years
DESCRIPTION The M28C16B and M28C17B devices consist of 2048x8 bits of low power, parallel EEPROM, fabricated with STMicroelectronics' proprietary single polysilicon CMOS technology. The devices offer fast access time, with low power dissipation, and require a single voltage supply.
Data Input / Output Write Enable Chip Enable Output Enable Ready/Busy (M28C17B only) Supply Voltage GroundThis is information on a product still in production but not recommended for new designs.
The M28C17B is like the M28C16B in every way, except that it has an extra ready/busy (RB) output. The device has been designed to offer a flexible microcontroller interface, featuring software handshaking, with Data Polling and Toggle Bit. The device supports a 64 byte Page Write operation. Software Data Protection (SDP) is also supported, using the standard JEDEC algorithm. SIGNAL DESCRIPTION The external connections to the device are summarized in Table 1, and their use in Table 3. Addresses (A0-A10). The address inputs are used to select one byte from the memory array during a read or write operation. Data In/Out (DQ0-DQ7). The contents of the data byte are written to, or read from, the memory array through the Data I/O pins. Chip Enable (E). The chip enable input must be held low to enable read and write operations. When Chip Enable is high, power consumption is reduced. Output Enable (G). The Output Enable input controls the data output buffers, and is used to initiate read operations. Write Enable (W). The Write Enable input controls whether the addressed location to be read, from or written to. Ready/Busy (RB). Ready/Busy (on the M28C17B only) is an open drain output that can be used to detect the end of the internal write cycle.
DEVICE OPERATION In order to prevent data corruption and inadvertent write operations, an internal VCC comparator inhibits the Write operations if the V CC voltage is lower than V WI (see Table 4A). Once the voltage applied on the VCC pin goes over the VWI threshold (V CC>VWI), write access to the memory is allowed after a time-out t PUW, as specified in Table 4A. Further protection against data corruption is offered by the E and W low pass filters: any glitch, on the E and W inputs, with a pulse width less than 10 ns (typical) is internally filtered out to prevent inadvertent write operations to the memory. Read The device is accessed like a static RAM. When E and G are low, and W is high, the contents of the addressed location are presented on the I/O pins. Otherwise, when either E is high, the I/O pins revert to their high impedance state. Write operations are initiated when both W and E are low and G is high. The device supports both W-controlled and E-controlled write cycles (as shown in Figure 11 and Figure 12). The address is latched during the falling edge or E (which ever occurs later) and the data is latched on the rising edge or E (which ever occurs first). After a delay, tWLQ5H, that cannot be shorter than the value specified in Table 10A, the internal write cycle starts. It continues, under internal timing control, until the write operation is complete. The commencement of this period can be detected by reading the Page Load Timer Status on DQ5. The
Symbol TA TSTG VCC VIO VI VESD Parameter Ambient Operating Temperature Storage Temperature Supply Voltage Input or Output Voltage Input Voltage Electrostatic Discharge Voltage (Human Body model) 2 Value 6.5 4000 Unit °C
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents. 3015.7 (100 pF, 1500 )PAGE LOAD TIMER STATUS TOGGLE BIT DATA POLLING
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