Details, datasheet, quote on part number: M28W320CB90GB1T
PartM28W320CB90GB1T
CategoryMemory => Flash
Description32 Mbit 2mb X16, Boot Block Low Voltage Flash Memory
CompanyST Microelectronics, Inc.
DatasheetDownload M28W320CB90GB1T datasheet
  

 

Features, Applications
32 Mbit (2Mb x16, Boot Block) Low Voltage Flash Memory

SUPPLY VOLTAGE VDD to 3.6V: for Program, Erase and Read VDDQ or 2.7V: Input/Output option VPP = 12V: optional Supply Voltage for fast Program

PROGRAMMING TIME: 10s typical Double Word Programming Option

PROGRAM/ERASE CONTROLLER (P/E.C.) COMMON FLASH INTERFACE MEMORY BLOCKS Parameter Blocks (Top or Bottom location) Main Blocks Figure 1. Logic Diagram

BLOCK PROTECTION UNPROTECTION All Blocks protected at Power Up Any combination of blocks can be protected WP for block locking

SECURITY 64-bit user Programmable OTP cells 64-bit unique device identifier One Parameter Block Permanently Lockable

AUTOMATIC STAND-BY MODE PROGRAM and ERASE SUSPEND 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS of DATA RETENTION Defectivity below 1ppm/year

ELECTRONIC SIGNATURE Manufacturer Code: 20h Top Device Code, 88BAh Bottom Device Code, M28W320CB: 88BBh

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Figure 2. BGA Connections (Top view through package)

RP WP VDD VDDQ VPP VSS NC Address Inputs Data Input/Output, Command Inputs Data Input/Output Chip Enable Output Enable Write Enable Reset Write Protect Supply Voltage Power Supply for Input/Output Buffers Optional Supply Voltage for Fast Program & Erase Ground Not Connected Internally

Symbol TA TBIAS TSTG V IO VDD, VDDQ V PP Parameter Ambient Operating Temperature (2) Temperature Under Bias Storage Temperature Input or Output Voltage Supply Voltage Program Voltage Value to 13 Unit C V

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Depends on range.

DESCRIPTION The a 32 Mbit non-volatile Flash memory that can be erased electrically at the block level and programmed in-system on a Word-byWord basis. The device is offered in the x 20mm) and the BGA47, 0.75mm ball pitch packages. When shipped, all bits of the M28W320C are in the 1 state. The array matrix organisation allows each block to be erased and reprogrammed without affecting other blocks. All blocks are protected against programming and erase at Power UP. Blocks can be unprotected to make changes in the application and then reprotected. A parameter block "Security Block" can be permanently protected against programming and erase in order to increase the data security. Each block can be programmed and erased over 100,000 cycles. VDDQ allows to drive the I/O pin down 1.65V. An optional 12V VPP power supply is provided to speed up the program phase at customer production line environment. An internal Command Interface (C.I.) decodes the instructions to access/modify the memory content. The Program/Erase Controller (P/E.C.) automatically executes the algorithms taking care of the timings necessary for program and erase operations. Verification is performed too, unburdening the microcontroller, while the Status Register tracks the status of the operation. The following instructions are executed by the M28W320C: Read Array, Read Electronic Signature, Read Status Register, Clear Status Register, Program, Double Word Program, Block Erase, Program/Erase Suspend, Program/Erase Resume, CFI Query, Block Protect, Block Lock, Block Unprotect, Protection Program. Organisation The M28W320C is organised as 2 Mbit by 16 bits. A0-A20 are the address lines; DQ0-DQ15 are the

Data Input/Output. Memory control is provided by Chip Enable E, Output Enable G and Write Enable W inputs. The Program and Erase operations are managed automatically by the P/E.C. Block protection against Program or Erase provides additional data security. Memory Blocks The device features an asymmetrical blocked architecture. The M28W320C has an array of 71 blocks: 8 Parameter Blocks of 4 KWord and 63 Main Blocks of 32 KWord. M28W320CT has the Parameter Blocks at the top of the memory address space while the M28W320CB locates the Parameter Blocks starting from the bottom. The memory maps are shown in Tables 3 and 4. All Blocks are protected at power up. Instruction are provided to protect, unprotect any block in the application. A second register locks the protection status while WP is low (see Block Protection Description). Each block can be erased separately. Erase can be suspended in order to perform either read or program in any other block and then resumed. Program can be suspended to read data in any other block and then resumed. The architecture includes a 128 bits Protection register that are divided into Two 64-bits segment. In the first one, starting from address 84h, is written a unique device number, while the second one, starting from 88h, is programmable by the user. The user programmable segment can be permanently protected programming the bit.1 of the Protection Lock Register (see protection register and Security Block). The parameter block is a security block. It can be permanently protected by the user programming the bit.2 of the Protection Lock Register (see protection register and Security Block).


 

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