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Part: M295V040B-55P3R
Category:
Memory
-> Flash
Description: 4 Mbit 512kb X8, Uniform Block Single Supply Flash Memory
Company: ST Microelectronics, Inc.
Datasheet: Download M295V040B-55P3R datasheet File size : 1053 kB
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Datasheet text preview:
M29F040B
4 Mbit (512Kb x8, Uniform Block) Sing le Supply Flash Memory
PR ELIM INARY DATA
s
SING LE 5V ± 10% SUPPLY VOLTAGE for PROG RAM, ERASE and READ OPERATIONS ACCESS TIME: 45ns PROG RAMMING TIME 8µs per Byte typical 8 UNIFORM 64 Kbytes MEMORY BLOCKS PROG RAM/ERASE CONTROLLER Embedded Byte Program algorithm Embedded Multi-Block/Chip Erase algorithm Status Register Polling and Toggle Bits
P LCC32 (K) TS OP32 (N) 8 x 20mm
s s
s s
s
ERASE SUSPEND and RESUME MODES Read and Program another Block during Erase Suspend
32
s
UNLOCK BYPASS PROGRAM COMMAND F aster Production/Batch Programming LOW PO WER CONSUMPTION Standby and Automatic Standby 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION Defectivity below 1 ppm/year ELECTRONIC SIGNATURE M anufacturer Code: 20h Device Code: E2h
A0-A18 19
1
PDIP 32 (P )
s
s
Figure 1. Logic Diagram
s
s
VCC
8 DQ0-DQ7
W E G
M29F040B
VSS
AI02900
Sept ember 1999
This is preliminary information on a new product now i n d evelopment or undergoing e valuation. D etails are subject to change without notice.
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M29F040B
Figure 2A. PLCC Connections Figure 2B. TSOP Connections
1 32 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 A14 A13 A8 A9 A11 G A10 E DQ7
9
M29F040B
25
17 DQ1 DQ2 VSS DQ3 DQ4 DQ5 DQ6
AI02901
A11 A9 A8 A13 A14 A17 W VCC A18 A16 A15 A12 A7 A6 A5 A4
A 12 A 15 A 16 A 18 V CC W A 17
1
32
8 9
M29F040B
25 24
16
17
AI02902
G A10 E DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3
Figure 2C. PDIP Connections
Table 1. Signal Names
A0- A18 DQ0 -DQ7 Address Inputs Dat a Inputs/Ou tputs Chip Enable Out put E nable Wr ite E nable Supply Voltage Gro und
A18 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
1 2 3 4 5 6 7 8 M29F040B 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC W A17 A14 A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3
E G W VCC VSS
AI02910
SUMMARY DESCRIPTION The M29F040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single 5V supply. O n power-up t he memory defaults to i ts Read mode where it can be read in the same way as a RO M or EPROM. T he M29F040B i s fully backward compatible wit h the M29F040. The memory is divided i nto blocks that can be erased independently s o i t i s possible to preserve
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M29 F040 B
Table 2. Absolute Maximum Ratings (1)
Symbol Parameter Ambient Operating Temperature (Temperature Range Op tion 1) TA Ambient Operating Temperature (Temperature Range Op tion 6) Ambient Operating Temperature (Temperature Range Op tion 3) TB IAS TSTG VIO (2) VCC VID Temperature Under Bias Storage Temperature Input or Outpu t Voltage Supply Voltage Identificat ion Voltage Value 0 to 70 40 to 85 40 to 125 50 to 125 65 to 150 0.6 to 6 0.6 to 6 0.6 to 13. 5 Unit °C °C °C °C °C V V V
Note: 1. Except f or th e rating "O perating Temperature Range", s tresses above those liste d in the Table "Absolute Maximum R atings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above t hose i ndicated in the O perating sections of this specification is not implied . Exposure to A bsolute M aximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelec tronics SURE Program and other relevant quality documents. 2. Minimum Voltag e may undershoot to 2V during tr ansition and for less than 20ns during transitions.
valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying t he memory. Program and Erase commands are written to the Command Interface of the m emory. An on-chip Program/Erase Controller simplifies t he process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to c ontrol t he memory i s consistent with JEDEC standards. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow si mple connection to most microprocessors, often wit hout additional logic. The memory is offered in T SOP32 (8 x 20mm), PLCC32 and PDIP32 packages. Access times of 45ns, 55ns, 70ns and 90ns are available. The memory is supplied with all the bits erased (set to `1'). SIGNAL DESCRIPTIONS See Figure 1, Logic Diagram, and Table 1, Signal Names, for a brief overview of the signals connected to this device. Address Inputs (A0-A18). T he Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control t he commands sent to the Command Interface of the internal sta te machine. Data Inputs/Outputs (DQ0-DQ7). The Data Inputs/Outputs output the data stored at the selected
address during a Bus Read operation. During Bus Write operations t hey represent the commands sent to the Command Interface of the internal state machine. Chip Enable (E). The Chip Enable, E, activates the memory, allowing Bus Read and Bus Write operations t o be performed. When Chip Enable is High, VIH, all other pins are ignored. Output Enable (G). The Output Enable, G, c ontrols the Bus Read operation of the memory. Write Enable (W). The Write Enable, W, controls the Bus Write operation of th e memory's Command Interface. VCC Supply Voltage. T he VCC Supply Voltage supplies the power for all operations (Read, Program, Erase etc .). The Command Interface is disabled when the VCC Supply Voltage is less than the Lockout Voltage, VLKO. This prevents Bus Write operations from accidentally damaging the data during power up, power down and power surges. If the Program/ Erase Controller is programming or erasing during this time then the operation aborts and the memory contents being altered will be invalid. A 0.1µF capacitor should be connected between the VCC Supply Voltage pin and the VSS Ground pin to decouple the current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during program and erase operations, I CC4. VS S Ground. The VSS Ground is the reference for all voltage measurements.
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