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Part: M29W400BT120N1T
Category: Memory -> Flash
Description: 4 Mbit 512kb x8 or 256kb X16, Boot Block Low Voltage Single Supply Flash Memory
Company: ST Microelectronics, Inc.
Datasheet: Download M29W400BT120N1T datasheet File size : 840 kB
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Datasheet text preview:
M29W400BT M29W400BB
4 Mbit (512 Kb x8 or 256Kb x16, Boot Blo ck) Low Voltage Sin gle Supply Flash Memory
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SING LE 2.7 to 3.6V SUPPLY VOLTAGE for PROG RAM, ERASE and READ OPERATIONS ACCESS TIME: 55ns PROG RAMMING TIME 10µs per Byte/Word typical 11 M EMORY BLOCKS 1 Boot Block (Top or Bottom Location) 2 Parameter and 8 Main Blocks
44
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PROG RAM/ERASE CONTROLLER Embedded Byte/Word Program algorithm Embedded Multi-Block/Chip Erase algorithm Status Register Polling and Toggle Bits Ready/Busy Output Pin
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TS OP48 (N) 12 x 20mm
SO44 (M )
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ERASE SUSPEND and RESUME MODES Read and Program another Block during Erase Suspend Figure 1. Logic Diagram
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UNLOCK BYPASS PROGRAM COMMAND F aster Production/Batch Programming TEMPORARY BLOCK UNPROTECTION MODE LOW PO WER CONSUMPTION Standby and Automatic Standby
18 A0-A17 W E G RP M29W400BT M29W400BB 15 DQ0-DQ14 DQ15A1 BYTE RB VCC
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100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION Defectivity below 1 ppm/year ELECTRONIC SIGNATURE M anufacturer Code: 0020h T op Device Code M29W400BT: 00EEh Bottom Device Code M29W400BB: 00EFh
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VSS
AI02934
April 2000
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M29W400BT, M2 9W 4 00B B
Figure 2. TSOP Connections
A15 A14 A13 A12 A11 A10 A9 A8 NC NC W RP NC NC RB NC A17 A7 A6 A5 A4 A3 A2 A1 1 48 A16 BYTE VSS DQ15A1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 G VSS E A0
Figure 3. SO Connections
12 M29W400BT 37 13 M29W400BB 36
NC RB A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11
1 2 3 4 5 6 7 8 9 10 11 M29W400BT 12 M29W400BB 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
RP W A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS DQ15A1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC
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AI02935
AI02936
Table 1. Signal Names
A0-A17 DQ0-DQ7 DQ8-DQ1 4 DQ15A1 E G W RP RB BYTE VCC VSS NC Address Inputs Dat a Inputs/Outputs Dat a Inputs/Outputs Dat a Input/Output or Address I nput Chip Enable Out put E nable Wr ite E nable Reset/Block Temporary Unprotec t Ready/Busy O utput Byte /Word Organization S elect Supply Voltage Gro und Not Connected Inte rnally
SUMMARY DESCRIPTION The M 29W400B is a 4 Mbit (512Kb x8 or 256Kb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. O n power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M 29W400B is fully backward compatible with the M29W400. The memory is divided i nto blocks that can be erased independently s o i t i s possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from m odifying t he memory. Program and Erase commands are written to the Command Interface of the m emory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required t o update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The c ommand set required to control t he memory is consistent with JEDEC standards.
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M29 W 40 0BT, M2 9W 400 BB
Table 2. Absolute Maximum Ratings (1)
Symb ol TA Ambient Operating Temperature (Temperature Range Opti on 6) TB IAS TS TG VIO (2) VCC V ID Temperature U nder Bias Storage Temperature Input or Output Voltage Supply Voltage Identification Voltage 40 t o 85 50 to 125 65 to 150 0.6 to 4 0.6 to 4 0.6 to 13.5 Parameter Ambient Operating Temperature (Temperature Range Option 1) Value 0 to 70 Unit °C °C °C °C V V V
Note: 1. Except for the rating " Operating T emperature R ange", stresses above those liste d in the Table "A bsolute Maximum R atings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above t hose indicated in t he Operating sections of t his s pecification is not impl ied. Exposure t o A bsolute M aximum R ating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum Voltage may undershoot t o 2V during tr ansition and for les s t han 20ns during tr ansitions.
Table 3. Top Boot Block Addresses M29W400BT
# 10 9 8 7 6 5 4 3 2 1 0 S ize (Kbytes) 16 8 8 32 64 64 64 64 64 64 64 Add ress Range (x8) 7C000h-7FFFFh 7A000h-7BFFFh 78000h-79FFFh 70000h-77FFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh 00000h-0FFFFh Addre ss Range (x16) 3E000h-3FFFF h 3D000h-3DFFF h 3C000h-3CFFF h 38000h-3BFFF h 30000h-37FFF h 28000h-2FFFFh 20000h-27FFF h 18000h-1FFFFh 10000h-17FFF h 08000h-0FFFFh 00000h-07FFF h
Table 4. Bottom Boot Bl ock Ad dresses M29W400BB
# 10 9 8 7 6 5 4 3 2 1 0 Size (Kbytes) 64 64 64 64 64 64 64 32 8 8 16 Address Rang e (x8) 70000h-7FFF Fh 60000h-6FFF Fh 50000h-5FFF Fh 40000h-4FFF Fh 30000h-3FFF Fh 20000h-2FFF Fh 10000h-1FFF Fh 08000h-0FFF Fh 06000h-07FFFh 04000h-05FFFh 00000h-03FFFh Address Rang e (x16) 38000h-3FFFF h 30000h-37FFFh 28000h-2FFFF h 20000h-27FFFh 18000h-1FFFF h 10000h-17FFFh 08000h-0FFFF h 04000h-07FFFh 03000h-03FFFh 02000h-02FFFh 00000h-01FFFh
The blocks in the memory are asymmetrically arranged, see Tables 3 and 4, Block Addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and t he remaining 32K is a small M ain Block where the application may be stored.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple c onnection to most microprocessors, often without additional logic. The memory is offered in TSOP48 (12 x 20mm) and SO44 packages and it is supplied with all the bits erased (set to '1').
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Others parts begin by m2
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