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Part: M48T35AV-10PC1TR
Category:
Memory
-> SRAM
Description: 256 Kbit 32kb x8 Timekeeper SRAM
Company: ST Microelectronics, Inc.
Datasheet: Download M48T35AV-10PC1TR datasheet File size : 1417 kB
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Datasheet text preview:
M48T35 M48T35Y
256 Kbit (32Kb x8) TIMEKEEPERŪ SRAM
s
INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY BYTEWIDETM RAM-LIKE CLOCK ACCESS BCD CODED YEAR, MONTH, DAY, DATE, HOURS, MINUTES and SECONDS FREQUEN CY TEST OUTPUT for REAL TIME CLOCK AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): M48T35: 4.5V VPFD 4.75V M48T35Y: 4.2V VPFD 4.5V
28
SNAPHAT (SH) Battery
s s
s
28 1
s
1
s
PCDIP28 (PC) Battery CAPHAT
SOH28 (MH)
s
SELF-CONTAINED BATTERY and CRYSTAL in the CAPHAT DIP PACKAGE SOIC PACKAGE PROVIDES DIRECT CONNECTION for a SNAPHAT HOUSING CONTAINING the BATTERY and CRYSTAL SNAPHATŪ HOUSING (BATTERY and CRYSTAL) is REPLACEABLE PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 32Kb x8 SRAMs
Figure 1. Logic Diagram
s
s
VCC
s
15 A0-A14
8 DQ0-DQ7
W
Table 1. Signal Names
A0-A14 DQ0-DQ7 E G W VCC VSS Address Inputs Data Inputs / Outputs Chip Enable Output Enable Write Enable Supply Voltage Ground
M48T35 M48T35Y
E G
VSS
AI01620B
February 2000
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M48T35, M48T35Y
Figure 2A. DIP Connections Figure 2B. SOIC Connections
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
1 2 3 4 5 6 7 M48T35 8 M48T35Y 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC W A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
1 2 3 4 5 6 7 M48T35Y 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC W A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3
AI01621B
AI01622B
Table 2. Absolute Maximum Ratings (1)
Symbol TA TSTG TSLD (2) VIO V CC IO PD Parameter Grade 1 Ambient Operating Temperature Grade 6 Storage Temperature (VCC Off, Oscillator Off) Lead Solder Temperature for 10 seconds Input or Output Voltages Supply Voltage Output Current Power Dissipation 40 to 85 40 to 85 260 0.3 to 7 0.3 to 7 20 1 °C °C °C V V mA W Value 0 to 70 Unit °C
Note: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability. 2. Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION: Negative undershoots below 0.3V are not allowed on any pin while in the Battery Back-up mode. CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
DESCRIPTION The M48T35/35Y TIMEKEEPERŪ RAM is a 32Kb x8 non-volatile static RAM and real time clock. The monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory and real time clock solution. The M48T35/35Y is a non-volatile pin and function equivalent to any JEDEC standard 32Kb x8 SRAM. It also easily fits into many ROM, EPROM,
and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special write timing or limitations on the number of writes that can be performed. The 28 pin 600mil DIP CAPHAT houses the M48T35/35Y silicon with a quartz crystal and a long life lithium button cell in a single package. The 28 pin 330mil SOIC provides sockets with gold plated contacts at both ends for direct con-
2/18
M48T35, M48T35Y
Table 3. Operating Modes (1)
Mode Deselect Write Read Read Deselect Deselect VSO to VPFD (min) (2) VSO 4.75V to 5.5V or 4.5V to 5.5V VCC E VIH VIL VIL VIL X X G X X VIL VIH X X W X VIL VIH VIH X X DQ0-DQ7 High Z DIN DOUT High Z High Z High Z Power Standby Active Active Active CMOS Standby Batter y Back-up Mode
Note: 1. X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 2. See Table 7 for details.
Figure 3. Block Diagram
OSCILLATOR AND CLOCK CHAIN 32,768 Hz CRYSTAL POWER
8 x 8 BiPORT SRAM ARRAY
A0-A14
32,760 x 8 SRAM ARRAY LITHIUM CELL VOLTAGE SENSE AND SWITCHING CIRCUITRY VPFD
DQ0-DQ7
E W G
VCC
VSS
AI01623
nection to a separate SNAPHAT housing containing the battery and crystal. The unique design allow s the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal damage due to the high temperatures required for device surfacemounting. The SNAPHAT housing is keyed to prevent reverse insertion. The SOIC and battery/crystal packages are shipped separately in plastic antistatic tubes or in Tape & Reel form.
For the 28 lead SOIC, the battery/crystal package (i.e. SNAPHAT) part number is "M4T28BR12SH1". As Figure 3 shows, the static memory array and the quartz controlled clock oscillator of the M48T35/35Y are integrated on one silicon chip. The two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEW IDE clock information in the bytes with addresses 7FF8h-7FFFh.
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