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Part: PSD4235G1V-B-12MI
Category:
Memory
-> Flash
Description: Flash In-system-programmable Peripherals For 16-bit MCUs
Company: ST Microelectronics, Inc.
Datasheet: Download PSD4235G1V-B-12MI datasheet File size : 2001 kB
Request For quote: Find where to buy PSD4235G1V-B-12MI
Datasheet text preview:
PSD4135G2
Flash In-System-Programmable Peripherals for 16-Bit MCUs
PRELIMINARY DATA
FEATUR ES SUMMARY s 5 V± 10% Single Supply Voltage:
s
Figure 1. Packages
Up to 4 Mbit of Primary Flash Memory (8 uniform sectors) 256Kbit Secondary Flash Memory (4 uniform sectors) Up to 64 Kbit SRAM Over 3,000 Gates of PLD: DPLD and CPLD 52 Reconfigurable I/O ports Enhanced JTAG Serial Port Programmable power management High Endurance: 100,000 Erase/Write Cycles of Flash Memory 1,000 Erase/Write Cycles of PLD
TQFP80 (U)
s
s s s s s s
January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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PSD4000 Series
PSD4135G2 Flash In-System-Programmable Peripherals for 16-Bit MCUs
Table of Contents
Introduction .......1 In-System Programming (ISP) JTAG ......2 In-Application re-Programming (IAP) ......2 Key Features.....3 PSD4000 Family ..............3 Block Diagram.........4 Architectural Overview .....5 Memory .........5 PLDs ........5 I/O Ports ........5 Microcontroller Bus Interface..........5 ISP via JTAG Port ...........6 In-System Programming (ISP) .......6 In-Application re-Programming (IAP) ......6 Page Register.........6 Power Management Unit .......6 Development System .......7 Pin Descriptions ......8 Register Description and Address Offset ........11 Register Bit Definition ....12 Functional Blocks ...........15 Memory Blocks .....15 Main Flash and Secondary Flash Memory Description .........15 SRAM .............26 Memory Select Signals ..........26 Page Register .........29 Memory ID Registers .............30 PLDs ......31 Decode PLD (DPLD)..............33 General Purpose PLD (GPLD)........33 Microcontroller Bus Interface........36 Interface to a Multiplexed Bus.........36 Interface to a Non-multiplexed Bus ..........36 Data Byte Enable Reference ..........38 Microcontroller Interface Examples..........39 I/O Ports ......44 General Port Architecture ......44 Port Operating Modes ............44 Port Configuration Registers (PCRs) .............48 Port Data Registers.......49 Ports A, B and C Functionality and Structure ......50 Port D Functionality and Structure ..............51 Port E Functionality and Structure ..............51 Port F Functionality and Structure ..............52 Port G Functionality and Structure ..............52
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PSD4000 Series
PSD4135G2 Flash In-System-Programmable Peripherals for 16-Bit MCUs
Table of Contents
Power Management ......53 Automatic Power Down (APD) Unit and Power Down Mode ..........53 Other Power Savings Options.........57 Reset and Power On Requirement ..........58 Programming In-Circuit using the JTAG-ISP Interface..59 Standard JTAG Signals .........60 JTAG Extensions ....60 Security and Flash Memories Protection .......60 Absolute Maximum Ratings ....61 Operating Range............61 Recommended Operating Conditions....61 AC/DC Parameters ........62 Example of Typical Power Calculation at Vcc = 5..0 V..63 Example of Typical Power Calculation at Vcc = 5..0 V in Turbo Off Mode...........64 DC Characteristics (5 V ± 10% versions)........65 Microcontroller Interface AC/DC Parameters (5 V ± 10% versions) ............67 DC Characteristics (3.0 V to 3.6 V versions) ..71 Microcontroller Interface AC/DC Parameters (3.0 V to 3.6 V versions) ......73 Timing Diagrams ............77 Pin Capacitance.............81 AC Testing Input/Output Waveforms .....81 AC Testing Load Circuit ..........81 Programming ........81 Pin Assignments ............82 Package Information ......83 Selector Guide ......85 Part Number Construction ......86 Ordering Information ......86 Document Revisions ......87 Worldwide Sales, Service and Technical Support .........88
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