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Part: PSD935F3V-A-12M
Category:
Memory
Description: Configurable Memory System on a Chip For 8-bit Microcontrollers
Company: ST Microelectronics, Inc.
Datasheet: Download PSD935F3V-A-12M datasheet File size : 2001 kB
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Datasheet text preview:
PSD935G2
Configurable Memory System on a Chip for 8-Bit Microcontrollers
PRELIMINARY DATA
FEATUR ES SUMMARY s 5 Vą 10% Single Supply Voltage:
s
Figure 1. Packages
Up to 4 Mbit of Primary Flash Memory (8 uniform sectors) 256Kbit Secondary Flash Memory (4 uniform sectors) Up to 64 Kbit SRAM Over 3,000 Gates of PLD: DPLD 52 Reconfigurable I/O ports Enhanced JTAG Serial Port Programmable power management High Endurance: 100,000 Erase/Write Cycles of Flash Memory 1,000 Erase/Write Cycles of PLD
TQFP80 (U)
s
s s s s s s
January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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PSD9XX Family
PSD935G2
Configurable Memory System on a Chip for 8-Bit Microcontrollers
1.0 Introduction
The PSD9XX series of Programmable Microcontroller (MCU) Peripherals brings In-System-Programmability (ISP) to Flash memory and programmable logic. The result is a simple and flexible solution for embedded designs. PSD9XX devices combine many of the peripheral functions found in MCU based applications: · 4 Mbit of Flash memory · A secondary Flash memory for boot or data · Over 3,000 gates of Flash programmable logic · 64 Kbit SRAM · Reconfigurable I/O ports · Programmable power management.
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PSD9XX Family
PSD935G2 The PSD935G2 device offers two methods to program PSD Flash memory while the PSD is soldered to a circuit board.
1.0 Introduction
(Cont.)
t In-System Programming (ISP) via JTAG
An IEEE 1149.1 compliant JTAG-ISP interface is included on the PSD enabling the entire device (both flash memories, the PLD, and all configuration) to be rapidly programmed while soldered to the circuit board. This requires no MCU participation, which means the PSD can be programmed anytime, even while completely blank. The innovative JTAG interface to flash memories is an industry first, solving key problems faced by designers and manufacturing houses, such as:
· First time programming How do I get firmware into the flash the very first time?
JTAG is the answer, program the PSD while blank with no MCU involvement.
· Inventory build-up of pre-programmed devices How do I maintain an accurate
count of pre-programmed flash memory and PLD devices based on customer demand? How many and what version? JTAG is the answer, build your hardware with blank PSDs soldered directly to the board and then custom program just before they are shipped to customer. No more labels on chips and no more wasted inventory.
· Expensive sockets How do I eliminate the need for expensive and unreliable
sockets? JTAG is the answer. Solder the PSD directly to the circuit board. Program first time and subsequent times with JTAG. No need to handle devices and bend the fragile leads.
t In-Application re-Programming (IAP)
Two independent flash memory arrays are included so the MCU can execute code from one memory while erasing and programming the other. Robust product firmware updates in the field are possible over any communication channel (CAN, Ethernet, UART, J1850, etc) using this unique architecture. Designers are relieved of these problems:
· Simultaneous read and write to flash memory How can the MCU program the
same memory from which it is executing code? It cannot. The PSD allows the MCU to operate the two flash memories concurrently, reading code from one while erasing and programming the other during IAP.
· Complex memory mapping How can I map these two memories efficiently?
A Programmable Decode PLD is embedded in the PSD. The concurrent PSD memories can be mapped anywhere in MCU address space, segment by segment with extremely high address resolution. As an option, the secondary flash memory can be swapped out of the system memory map when IAP is complete. A built-in page register breaks the MCU address limit.
· Separate program and data space How can I write to flash memory while it
resides in "program" space during field firmware updates, my 80C51 won't allow it The flash PSD provides means to "reclassify" flash memory as "data" space during IAP, then back to "program" space when complete. PSDsoft ST's software development tool guides you through the design process step-by-step making it possible to complete an embedded MCU design capable of ISP/IAP in just hours. Select your MCU and PSDsoft will take you through the remainder of the design with point and click entry, covering...PSD selection, pin definitions, programmable logic inputs and outputs, MCU memory map definition, ANSI C code generation for your MCU, and merging your MCU firmware with the PSD design. When complete, two different device programmers are supported directly from PSDsoft FlashLINK (JTAG) and PSDpro. The PSD935G2 is available in an 80-pin TQFP package. Please refer to the revision block at the end of this document for updated information.
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