Details, datasheet, quote on part number: STA2058
DescriptionTeseo GPS Platform High-sensitivity Baseband
CompanyST Microelectronics, Inc.
DatasheetDownload STA2058 datasheet
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Features, Applications


Single chip baseband with embedded flash Complete embedded memory system: FLASH 256K+16K bytes RAM 64K bytes ARM7TDMI 32 bit processor High Performance GPS engine (HPGPS) SBAS (WAAS and EGNOS) supported Sensitivity (-146dBm Acquisition, -159dBm Tracking) Time to first Fix (1s reacquisition, 2.5s Hot Start, 34s Warm Start, 39s Cold Start) Accuracy (2m Autonomous) External Memory Interface (EMI) supporting 64Mbite of external SRAM, FLASH and ROM Extensive GPS Receiver Interfaces: 48 GPIOs, 4 UARTs, 2 SPIs, I2Cs, 2 CANs 2.0, 1 USB 1.1,1 HDLC and 4 channels ADC ST proprietary Flash embedded technology LFBGA144 and LQFP64 lead-free package to 85C operating temperature range


STA2058 is the high-sensitivity baseband of Teseo GPS Platform which include the STA5620 RF Front-End. The embedded flash memory enables the equipment manufacturer to load the entire GPS software (including tracking, acquisition, navigation and data output) after customizing its interfaces to his needs. A standard GPS library is available from ST. Teseo is the ideal solution for consumer, Handheld, PND (Portable Navigation), in vehicle Navigation and Telematics systems. SBAS (WAAS and EGNOS) feature are also supported.

STA2058 module reference design (25x25mm) Evaluation board hosting STA2058 module SDK board (for application SW development)

Device selection features Description GPS Baseband GPS Baseband Package LFBGA144 LQFP64 Body size GPIOs CAN 2 1 EMI Available Not available 48 32

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DC electrical characteristic. 11 AC electrical characteristics. 12 nRSTIN input filter characteristics. 12 Oscillator electrical characteristics. 14 ADC Electrical characteristics. 14 PLL electrical characteristics. 15 LVD electrical characteristics. 15 GPS performances. 16

ARM7TDMI 16/32 bit RISC CPU based host microcontroller running at a frequency to 66 MHz. Complete Embedded Memory System: FLASH 256K bytes + 16K bytes (100K erasing/programming cycles) RAM 64K bytes.

External memory interface provides glueless support for up to four banks of external SRAM, FLASH, ROM. High Performance GPS engine (HPGPS). ST Proprietary CMOS (0.18 m) Flash Embedded technology. SBAS (WAAS and EGNOS) supported to 85C operating temperature range. 144-pin LFBGA package and 64-pin LQFP package Power Supply: to 3.6V operating supply range for Input/Output periphery to 3.6V operating supply range for A/D Converter reference 1.8V operating supply range for core supply provided either by internal Voltage Regulator (with external stabilization capacitor) or by external supply voltage.

Reset and Clock Control Unit able to provide low power modes (WAIT, SLOW, STOP, STANDBY) and to generate the internal clock from the external reference through integrated PLL. 48 programmable General Purpose I/O, each pin programmable independently as digital input or digital output; in LQFP64) are multiplexed with peripheral functions; 16 can generate an interrupt on input level/transition. Real time clock module with 32khz low power oscillator and separate power supply to continue running during stand-by mode. 16-bit Watchdog Timer with 8 bits prescaler for system reliability and integrity. 2 CAN modules compliant with the CAN specification V2.0 part B (active) and bit rate can be programmed to 1 MBaud.One additional CAN at 1Mbps (for STA2058 EM SIP version) Four 16-bit programmable Timers with 7 bit prescaler, up to two input capture/output compare, one pulse counter function, one PWM channel with selectable frequency each. 4 channels 12-bit sigma-delta Analog to Digital Converter, single channel or multi channel conversion modes, single-shot or continuous conversion modes, sample rate 1 KHz, conversion range 0-2.5V. Three Serial Communication Interfaces (UART) allow full duplex, asynchronous, communications with external devices, independently programmable TX and RX baud rates to 625K baud. One UART adapted to suit Smart Card interface needs, for asynchronous SC as defined by ISO 7816-3. It includes SC clock generation. Two Serial Peripheral Interfaces (SPI) allow full duplex, synchronous communications with external devices, master or slave operation, max baud rate of 5.5Mb/s. One SPI may be used as Multimedia Card interface.


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