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Part: STB16NK60Z-S
Category:
Description: N-channel 600V - 0.38 Ohm - 14A TO-220/I2SPAK / TO-247 Zener-protected SuperMESH™MOSFET
Company: ST Microelectronics, Inc.
Datasheet: Download STB16NK60Z-S datasheet File size : 303 kB
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Datasheet text preview:
STP16NK60Z - STB16NK60Z-S STW16NK60Z
N-CHANNEL 600V - 0.38 - 14A TO-220 / I2SPAK / TO-247 Zener-Protected SuperMESHTM MOSFET
TYPE STP16NK60Z STB16NK60Z-S STW16NK60Z
s s s s s s
VDSS 600 V 600 V 600 V
RDS(on) < 0.42 < 0.42 < 0.42
ID 14 A 14 A 14 A
Pw 190 W 190 W 190 W
3 1 2
TYPICAL RDS(on) = 0.38 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VER Y LOW INTR INSIC CAPACITAN CES VER Y GOOD MANUFACTURING REPEATIBILITY
3 12
TO-220
I2SPAK
3 2 1
TO-247
DESCRIPTION The SuperMESH TM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly dow n, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products.
INTERNAL SCHEMATIC D IAGRAM
APPLICATIONS s HIGH CURRE NT, HIGH S P EE D S WIT CHING s I DEA L FO R O FF -LINE PO WE R SUP P LI E S
OR D E R C OD E
PART NUMBER STP16NK60Z STB16NK60Z-S STW16NK60Z M A RKIN G P16NK60Z B16NK60Z W16NK60Z PACKAGE TO-220 I2SPAK TO-247 PACKAGING TUBE TUBE TUBE
March 2004
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STP16NK60Z - STB16NK60Z-S - STW16NK60Z
ABSOLUTE MAXIMUM RA TINGS
Symbol VDS VDGR V GS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate source ESD (HBM-C= 100pF, R= 1.5K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature Value 600 600 ± 30 14 8.8 56 190 1.51 6000 4.5 -55 to 150 Unit V V V A A A W W/°C V V/ns °C
( ) Pulse width limited by safe operating area (1) ISD 14 A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX. (*) Limited only by maximum temperature allowed
THERMAL DATA
TO-220/ I²SPAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 62.5 300 0.66 50 TO-247 °C/W °C/W °C
AVA LANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 14 360 Unit A mJ
GATE-SOUR CE ZENER DIODE
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs=± 1mA (Open Drain) M i n. 30 Typ. Max. Unit V
PROTECTION FEA TURES OF GATE-TO-SOURCE ZENER DIOD ES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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STP16NK60Z - STB16NK60Z-S - STW16NK60Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON / OF F
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V VDS = VGS, ID = 100 µA VGS = 10V, ID = 7 A 3 3.75 0.38 Min. 600 1 50 ±10 4.5 0.42 Typ. Max. Unit V µA µA µA V
DYN AMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 7 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 12 2650 285 62 158 30 25 70 15 86 17 46 Max. Unit S pF pF pF pF ns ns ns ns nC nC nC
VGS = 0V, VDS = 0V to 480V VDD = 480 V, ID = 14 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 14 A, VGS = 10V
SOURCE DR AIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Q rr IRRM trr Q rr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 14 A, VGS = 0 ISD = 14 A, di/dt = 100 A/µs VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) ISD = 14 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 490 5.4 22 585 7 24 Test Conditions Min. Typ. Max. 14 56 1.6 Unit A A V ns µC A ns µC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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