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Part: STB20NK50Z
Category:
Discrete
-> Transistors
-> FETs (Field Effect Transistors)
-> MOSFETs
-> Power MOSFETs
-> Medium Voltage
Description: N-channel 500V - 0.23 Ohm - 20A TO-220 / D2PAK / TO-247 Zener-protected Supermesh Power MOSFET
Company: ST Microelectronics, Inc.
Datasheet: Download STB20NK50Z datasheet File size : 306 kB
Request For quote: Find where to buy STB20NK50Z
Datasheet text preview:
STP20NK50Z - STW20NK50Z STB20NK50Z
N-CHANNEL 500V - 0.23 - 20A TO-220/D2PAK/TO-247 Zener-Protected SuperMESHTMPower MOSFET
TYPE STB20NK50Z STP20NK50Z STW20NK50Z
s s s
VDSS 500 V 500 V 500 V
RDS(on) < 0.27 < 0.27 < 0.27
ID 20 A 20 A 17 A
Pw 190 W 190 W 190 W
3 1 2
2 1 3
s s
TYPICAL RDS(on) = 0.23 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTEDGATE CHARGE MINIMIZED VER Y LOW INTR INSIC CAPACITAN CES VER Y GOOD MANUFACTURING REPEATIBILITY
TO-220
3 1
TO-247
D2PAK
DESCRIPTION The SuperMESH TM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly dow n, special care is taken to ensure a very good dv/dt ca pab ility for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products.
INTERNAL SCHEMATIC D IAGRAM
APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s I DEA L FO R O FF -LINE PO WE R SUP P LI E S, ADAPTORS AND PFC
s
ORDERING INFORMATION
SALES TYPE STB20NK50ZT4 STP20NK50Z STW20NK50Z MARKING B20NK50Z P20NK50Z W20NK50Z PACKAGE D2PAK TO-220 TO-247 PACKAGING TAPE & REEL TUBE TUBE
September 2003
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STP20NK50Z - STB20NK50Z - STW20NK50Z
ABSOLUTE MAXIMUM RA TINGS
Value Symbol VDS VD G R V GS ID ID ID M ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate source ESD(HBM-C=100 pF, R=1.5 K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature 4000 4.5 -55 to 150 20 10 64 190 1.51 6000
STP20NK50Z STB20NK50Z STW20NK50Z
Unit
500 500 ± 30 17 10.71 68
V V V A A A W W/°C V V/ns °C
( ) Pulse width limited by safe operating area (1) ISD 20A, di/dt 200A/µs, VDD V(BR)DSS, Tj T JMAX. (*) Limited only by maximum temperature allowed
THERMAL DATA
Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 0.66 62.5 300 °C/W °C/W °C
AVA LANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 20 850 Unit A mJ
GATE-SOUR CE ZENER DIODE
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs=± 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEA TURES OF GATE-TO-SOURCE ZENER DIOD ES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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STP20NK50Z - STB20NK50 Z - STW20NK50Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON / OF F
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20 V VDS = VGS, ID = 100 µA VGS = 10V, ID = 8.5 A 3 3.75 0.23 Min. 500 1 50 ±10 4.5 0.27 Typ. Max. Unit V µA µA µA V
DYN AMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 8.5 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 13 2600 328 72 187 Max. Unit S pF pF pF pF
VGS = 0V, VDS = 0V to 640V
SW ITCHIN G ON
Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 250 V, ID = 8.5 A RG = 4.7 , VGS = 10 V (Resistive Load see, Figure 3) VDD = 400 V, ID = 17 A, VGS = 10 V Min. Typ. 28 20 85 15.5 42 Max. Unit ns ns nC nC nC
SW ITCHIN G OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 250 V, ID = 8.5 A RG = 4.7 , VGS = 10 V (Resistive Load see, Figure 3) VDD = 400 V, ID = 17 A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 70 15 16 15 30 Max. Unit ns ns ns ns ns
SOURCE DR AIN DIODE
Symbol ISD ISDM (2) VSD (1) tr r Q rr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 17 A, VGS = 0 ISD = 17 A, di/dt = 100 A/µs VR = 100 V, Tj = 150°C (see test circuit, Figure 5) 355 5.72 26 Test Conditions Min. Typ. Max. 17 68 1.6 Unit A A V ns µC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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