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Part: STB20NM60T4
Category: Discrete -> Transistors -> FETs (Field Effect Transistors) -> MOSFETs -> Power MOSFETs -> Medium Voltage
Description: N-channel 600V - 0.25 Ohm - 20A TO-220/TO-220FP/D2PAK/I2PAK Mdmesh Power MOSFET
Company: ST Microelectronics, Inc.
Datasheet: Download STB20NM60T4 datasheet File size : 289 kB
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Datasheet text preview:
STP20NM60 - STP20NM60FP STB20NM60 STB20NM60-1
N-CHANNEL 600V - 0.25 - 20A TO-220/FP/D2PAK/I2PAK MDmeshTMPower MOSFET
TYPE STP20NM60 STP20NM60FP STB20NM60 STB20NM60-1
s s s s s
VDSS 600 600 600 600 V V V V
RDS(on) < < < < 0.29 0.29 0.29 0.29
ID 20 20 20 20 A A A A
3 1 2
1
3 2
TYPICAL RDS(on) = 0.25 HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE
TO-220
TO-220FP
3 12
3 1
DESCRIPTION The MDmeshTM is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company's PowerMESHTM horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company's proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition's products. APPLICATIONS The MDmeshTM family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ABSOLUTE MAXIMUM RA TINGS
Symbol VDS VD G R V GS ID ID I D M (q ) PTOT dv/dt(1) VISO Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Winthstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature
I2PAK
D2PAK
INTERNAL SCHEMATIC DIAGRAM
Value STP(B)20NM60(-1) 600 600 ±30 20 12.6 80 192 1.2 15 -65 to 150 150
(1)ISD 20A, di/dt 400A/µs, VDD V(BR)DSS, Tj TJMAX. (*)Limited only by maximum temperature allowed
Unit STP20NM60FP V V V 20(*) 12.6(*) 80(*) 45 0.36 2500 A A A W W/°C V/ns V °C °C
(·)Pulse width limited by safe operating area
February 2003
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STP20NM60 / STP20NM60FP / STB20NM60 / STB20NM60-1
THERMAL DATA
TO-220/D2PAK/I2PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 0.65 62.5 300 TO-220FP 2.8 °C/W °C/W °C
Maximum Lead Temperature For Soldering Purpose
AVA LANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 10 650 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPEC IFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ±30V Min. 600 1 10 ±100 Typ. Max. Unit V µA µA nA
ON ( 1 )
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 10A Min. 3 Typ. 4 0.25 Max. 5 0.29 Unit V
DYN AMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (2) Rg Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Gate Input Resistance VGS = 0V, VDS = 0V to 400V f=1 MHz Gate DC Bias=0 Test Signal Level=20mV Open Drain Test Conditions VDS > ID(on) x RDS(on)max, ID = 10A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 11 1500 350 35 130 1.6 Max. Unit S pF pF pF pF
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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STP20NM60 / STP20NM60FP / STB20NM60 / STB20NM60-1
ELECTRICAL CHARACTERISTICS (CONTINUED) SW ITCHIN G ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 200V, ID = 10 A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 20A, VGS = 10V Min. Typ. 25 20 39 10 20 54 Max. Unit ns ns nC nC nC
SW ITCHIN G OFF
Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 480V, ID = 20 A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 6 11 21 Max. Unit ns ns ns
SOURCE DR AIN DIODE
Symbol ISD ISDM (2) VSD (1) tr r Q rr Irrm tr r Q rr Irrm Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A, VGS = 0 ISD = 20 A, di/dt = 100A/µs, VDD = 100 V, Tj = 25°C (see test circuit, Figure 5) ISD = 20 A, di/dt = 100A/µs, VDD = 100 V, Tj = 150°C (see test circuit, Figure 5) 390 5 25 510 6.5 26 Test Conditions Min. Typ. Max. 20 80 1.5 Unit A A V ns µC A ns µC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area for TO-220/D2PAK/I2PA K
Safe Operating Area for TO-220FP
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