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Part: STD1LNK60Z-1
Category: Discrete -> Transistors -> FETs (Field Effect Transistors) -> MOSFETs -> Power MOSFETs -> Medium Voltage
Description: N-channel 600V - 13 Ohm - 0.8A TO-92/IPAK Zener-protected Supermesh PowermosFET
Company: ST Microelectronics, Inc.
Datasheet: Download STD1LNK60Z-1 datasheet File size : 3604 kB
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Datasheet text preview:
STQ1NK6 0ZR STD1LNK60Z-1
N-CHANNEL 600V - 13 - 0.8A TO-92/IPAK Zener-Protected SuperMESHTM Power MOSFET
TYPE STQ1NK60ZR STD1LNK60Z-1 VDSS 600 V 600 V RDS(on) < 15 < 15 ID 0.3 A 0.8 A PW 3W 25 W
1 N G
YPICAL RDS(on) = 13 XTREMELY HIGH dv/dt CAPABILITY SD IMPROVED CAPABILITY 00% AVALANCHE TESTED EW HIGH VOLTAGE BENCHMARK ATE CHARGE MINIMIZED T E E
TO-92 (Ammopack)
TO-92
3 2 1
IPAK DESCRIPTION The SuperMESH TM series is obtained through an extreme optimization of ST's well established stripbased PowerMESHTM layout. In addition to pushing on-resistance significantly dow n, special care is taken to ensure a very good dv/dt ca pab ility for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products. INTERNAL SCHEMA TIC DIAGRAM
APPLICATIONS A C ADAPTORS AND BATTERY CHARGERS S WITH MODE POW ER SUPPLIES (SMPS)
ORDERING INFORMATION
SALES TYPE STQ1NK60ZR STQ1NK60ZR-AP STD1LNK60Z-1 MARKING 1NK60ZR 1NK60ZR D1LNK60Z PACKAGE TO-92 TO-92 IPAK PACKAGING BULK AMMOPAK TUBE
June 2003
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STQ1NK60ZR - STD1LNK60Z-1
ABSOLUTE MAXIMUM RA TINGS
Symbol VDS VD G R V GS ID ID ID M ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter IPAK Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature 0.8 0.5 3.2 25 0.24 800 4.5 -55 to 150 600 600 ± 30 0.3 0.189 1.2 3 0.025 Value TO-92 V V V A A A W W/°C V V/ns °C Unit
( ) Pulse width limited by safe operating area (1) ISD 0.3A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
THERMAL DATA
IPAK Rthj-case Rthj-amb Rthj-lead Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Junction-lead Max Maximum Lead Temperature For Soldering Purpose 5 100 -275 TO-92 -120 40 260 °C/W °C/W °C/W °C
AVA LANCHE CHARACTERISTICS
Symbol IAR EA S Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 0.8 60 Unit A mJ
GATE-SOUR CE ZENER DIODE
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs=± 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEA TURES OF GATE-TO-SOURCE ZENER DIOD ES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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STQ1NK60ZR - STD1LNK60Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON / OF F
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V VDS = VGS, ID = 50 µA VGS = 10V, ID = 0.4 A 3 3.75 13 Min. 600 1 50 ±10 4.5 15 Typ. Max. Unit V µA µA µA V
DYN AMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = V, ID = 0.4 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 0.5 94 17.6 2.8 11 Max. Unit S pF pF pF pF
VGS = 0V, VDS = 0V to 480V
SW ITCHIN G ON
Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 300V, ID = 0.4 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 0.8 A, VGS = 10V Min. Typ. 5.5 5 4.9 1 2.7 6.9 Max. Unit ns ns nC nC nC
SW ITCHIN G OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 300V, ID = 0.4A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD =480V, ID = 0.8A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 13 28 28 12.5 48 Max. Unit ns ns ns ns ns
SOURCE DR AIN DIODE
Symbol ISD ISDM (2) VSD (1) tr r Q rr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 0.8A, VGS = 0 ISD = 0.8 A, di/dt = 100A/µs VDD = 20V, Tj = 150°C (see test circuit, Figure 5) 140 224 3.2 Test Conditions Min. Typ. Max. 0.8 2.4 1.6 Unit A A V ns nC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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