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Part: STD1NC70ZT4
Category:
Discrete
-> Transistors
-> FETs (Field Effect Transistors)
-> MOSFETs
-> Power MOSFETs
-> Medium Voltage
Description: N-channel 700V 7.3 Ohm 1.4A TO-220/TO-220FP/DPAK/IPAK Zener-protected Powermesh Iii MOSFET
Company: ST Microelectronics, Inc.
Datasheet: Download STD1NC70ZT4 datasheet File size : 3604 kB
Request For quote: Find where to buy STD1NC70ZT4
Datasheet text preview:
STP2NC70Z, STP2NC70ZFP STD1NC70Z, STD1NC70Z-1
N-CHANNEL 700V - 7.3 - 1.4A TO-220/FP/DPAK/IPAK Zener-Protected PowerMESHTMIII MOSFET
TYPE STP2NC70Z STP2NC70ZFP STD1NC70Z STD1NC70Z-1
s s s s s
VDSS 700 700 700 700 V V V V
RDS(on) < 8.5 < 8.5 < 8.5 < 8.5
ID 1.4 A 1.4 A 1.4 A 1.4 A
Pw 50 W 25 W 45 W 45 W
1
3 2
TYPICAL RDS(on ) = 7.3 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VER Y LOW INTRINSIC CAPACITANCES
TO-220
TO-220FP
3 2 1
3 1
IPAK
DPAK
DESCRIPTION The third generation of MESH OVERLAYTM Power MOSFETs for very high voltage exhibits unsurpassed on-resistance per unit area while integrating back-to-back Zener diodes between gate and source. Such arrangement gives extra ESD capability with higher ruggedness performance as requested by a large variety of single-switch applications..
APPLICATIONS s S ING LE -ENDE D SMPS IN MONITORS, COMPUTER AND INDUSTRIAL APPLICATION s WE LDI NG EQUIPMENT
ORDERING INFORMATION
SALES TYPE STP2NC70Z STP2NC70ZFP STD1NC70ZT4 STD1NC70Z-1 MARKING P2NC70Z P2NC70ZFP D1NC70Z D1NC70Z PACKAGE TO-220 TO-220FP DPAK IPAK PACKAGING TUBE TUBE TAPE & REEL TUBE
February 2002
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STP2NC70Z, STP2NC70ZFP, STD1NC70Z, STD1NC70Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
ST P2NC70Z
Value
STP2NC70ZFP STD1NC70Z STD1NC70Z-1
Unit
VDS V DG R VGS ID ID IDM (l) PTOT IGS VESD(G-S) dv/dt (1) VISO Tj Tstg
Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate-source Current (DC) Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature 1.4 0.9 5.6 50 0.4
700 700 ± 25 1.4 (*) 0.9 (*) 5.6 (*) 25 0.2 ± 50 2000 3 2500 -65 to 150 -65 to 150 1.4 0.9 5.6 45 0.36
V V V A A A W W/°C mA V V/ns V °C °C
(l) Pulse width limited by safe operating area (1) I SD 10A, di/dt 200A/µs, VDD V (BR)DSS, Tj T JMAX. (*) Limited only by maximum temperature allowed
THERMAL DATA
TO-220 Rthj-case Rthj-pcb Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-pcb Max (for SMD) (#) Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 62.5 300 2.5 TO-220FP 5 DPAK IPAK 2.75 100 100 2 75 °C/W °C/W °C/W °C
AVA LANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 1.4 60 Unit A mJ
GATE-SOUR CE ZENER DIODE
Symbol BVGSO T Parameter Gate-Source Breakdown Voltage Voltage Thermal Coefficient Test Conditions Igs=± 1mA (Open Drain) T=25°C Note(3) Min. 25 1.3 Typ. Max. Unit V 10-4/°C
Note: 3. VBV = T (25°-T) BVGSO(25°) (#) When mounted on minimum Footprint
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and costeffective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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STP2NC70Z, STP2NC70ZFP, STD1NC70Z, STD1NC70Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON / OF F
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V VDS = VGS, ID = 250µA VGS = 10V, ID = 0.7 A 3 4 7.3 Min. 700 1 50 ±10 5 8.5 Typ. Max. Unit V µA µA µA V
DYN AMIC
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 0.7 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 1.2 305 34 3.6 28 Max. Unit S pF pF pF pF
VGS = 0V, VDS = 0V to 560V
SW ITCHIN G ON
Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 350 V, ID = 0.8 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 560V, ID = 1.6 A, VGS = 10V Min. Typ. 11 8 8 2 3.8 12 Max. Unit ns ns nC nC nC
SW ITCHIN G OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 350 V, ID = 0.8 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 560V, ID = 1.6 A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 27 30 20 5 25 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) tr r Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 1.4 A, VGS = 0 ISD = 1.6 A, di/dt = 100A/µs VDD = 30V, Tj = 150°C (see test circuit, Figure 5) 370 1.3 6.8 Test Conditions Min. Typ. Max. 1.4 5.6 1.6 Unit A A V ns µC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS .
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