Details, datasheet, quote on part number: STLC60133TR
DescriptionXDSL Line Driver
CompanyST Microelectronics, Inc.
DatasheetDownload STLC60133TR datasheet
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Features, Applications

LOW NOISE H z HIGH PEAK OUTPUT CURRENT: 500 mA HIGH SPEED 140MHz Gain Bandwidth 30MHz Gain Flatness 400 V/us Slew Rate

LOW POWER OPERATION to 15V Voltage Supply 12.5 mA/Amp (typ) Supply current Power reduced Current

LOW SINGLE TONE DISTORTION THERMAL AND OVERLOAD PROTECTION HTSSOP28 PACKAGE TO +85C OPERATING RANGE Two digital pins (PWDN0 and PWDN1) allow the driver to work in full performance mode, in low-power mode or two intermediate bias states. The low-power mode biases the output stage in order to provide a low impedance at the amplifier outputs for back termination. The STLC60133 is designed optimizing bandwidth and distortion performances. For proper device operating it is necessary to work with a gain level greater than 15.6dB. Typical differential gain is normally +27dB, while typical common mode gain is 15.6dB

DESCRIPTION The is a dual amplifier featuring a high slew rate and a large bandwidth optimized for XDSL applications. The device is available in a HTSSOP 28 pin package (4x9 mm) with an exposed leadframe. Thanks to its small package this line driver is suitable for high density ADSL line card. Figure 1. BLOCK DIAGRAM

This is preliminary information on a new product now in development. Details are subject to change without notice.

Symbol VCC VSS Vid Vi Top Tstg Tj Parameter Positive Supply voltage (note1) Negative Supply voltage (note1) Differential Input Voltage (note2) Common mode Input Voltage Operating Free Air Temperature Range Storage temperature Junction temperature Value to +150 Unit C

Symbol Rthj-amb Parameter Thermal resistance junction to ambient (note 3) Value 29 Unit C/W

Symbol Top VCC VSS VDGND Vicm Parameter Operating Temperature Range Positive Supply voltage (note1) Negative Supply voltage (note1) Digital Ground level Common Mode Input Voltage Range Value VSS+5<VDGND<VCC-5 1 Unit C

Notes 1) All voltages values , except differential voltage , are with respect to network ground terminal. 2) Differential voltages are non-inverting input terminal with respect to the inverting input terminal 3) Specification is for device a 4 layer board within 10 square inches of oz. copper at +85C and 200m/s air velocity. With 0m/s air velocity the parameter increases to 33C/W.

Non Inverting Input of Op. Amplifier 2 Inverting Input of Op. Amplifier 2 Ouput of Op. Amplifier 2 Positive Supply Voltage Ouput of Op. Amplifier 1 Inverting Input of Op. Amplifier 1 Non Inverting Input of Op. Amplifier 1 Power Down 1 logic input Power Down 0 logic input Negative Supply Voltage Bias Control pin To be left not connected

Power Down Management The STLC60133 provides several quiescent bias levels from full performance, to reduced bias (in three steps through PWDN0/1 pins) or to full OFF operation (through BIAS pin). According to the different XDSL application (both site CO and CPE), different bias levels can be chosen maintaining good MTPR performances. In the following table are shown the bias levels versus the PWDN values.

PWDN0 X (low Zout but not OFF) Full OFF (High Zout via 250uA pulled out of BIAS pin) Bias Level


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