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Details, datasheet, quote on part number:TL072MD
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| Part: | TL072MD |
| Category: | Analog & Mixed-Signal Processing => Amplifiers |
| Description: | Low Noise J-FET Dual Operational Amplifiers |
| Company: | ST Microelectronics, Inc. |
| Datasheet: | Download TL072MD datasheet File size : 96 kB |
| Request For quote: | Find where to buy TL072MD
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Datasheet text preview:
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TL 07 2 T L 07 2 A - T L 07 2 B
LOW NOISE J -FET DUAL OPERATIONAL AMPLIFIERS
.WIDE . . . . . . . .
COMMON-MODE (UP TO VCC+) AND DIFFERENTIAL VOLTAGE RANGE LOW INPUT BIAS AND OFFSET CURRENT LOW NOISE en = 15nV/Hz (typ) OUTPUT SHORT-CIRCUIT PROTECTION HIGH INPUT IMPEDANCE JFET INPUT STAGE LOW HARMONIC DISTORTION : 0.01% (typ) INTERNAL FREQUENCY COMPENSATION LATCH UP FREE OPERATION HIGH SLEW RATE : 16V/µs (typ)
N DIP8 (Plastic Package)
D SO8 (Plastic M icropackage)
DE SC RI P T I O N The TL072, TL072A and TL072B are high speed JFET input dual operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset current, and low offset voltage temperature coefficient. P I N CO NNE CTI O NS (t o p v ie w)
ORDER CODES
Part Num ber TL072M/AM/BM TL072I/AI/BI TL072C/AC/BC Exa mple : TL072CN Te mperature R ange 55oC, +125oC 40 C, +105 C 0 C, +70 C
o o o o
Package N · · · D · · ·
1 2 3 4 + +
8 7 6 5
1 2 3 4 5 6 7 8
-
Output 1 Inverting input 1 Non-inverting input 1 VCC Non-inverting input 2 Inverting input 2 Output 2 + VCC
December 1998
1/9
TL07 2 - TL072 A - TL072B
S CHE MATI C DI AG RAM
VC C
N o n- i nv e r t i n g i np ut I nv e r t i n g i n put
1 0 0
20 0
Output
1 0 0
30k
1 / 2 T L 07 2
8.2k
1.3k
VCC
35k
1. 3 k
35k
1 0 0
ABSOLUTE MAXIMUM RATINGS
Sy mbol VC C Vi Vid P t ot Toper Supply Voltage - (note 1) Input Voltage - (note 3) Differential Input Voltage - (note 2) Power Dissipation Output Short-circuit Duration - (note 4) Operating Free Air Te mperature Range TL072C,AC,BC TL072I,AI,BI TL072M,AM,BM P arameter V alue ±18 ±15 ±30 680 Infinite 0 to 70 40 to 105 55 to 125 65 to 150
o
Unit V V V mW C
Tstg
Notes :
Storage Temperature Range
o
C
1. All voltage values, ex cept differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC+ and VCC. 2. Differential voltages are at the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. 4. The output may be shorted to ground or to ei ther supply. Temperature and /or s upply voltages must be limited to ensure that the dissipation rating is not exceeded.
2/9
TL07 2 - TL072 A - TL072B
ELECTRICAL CHARACTERISTICS VC C = ±15V, Tamb = 25oC (unless otherwise specified)
Symbol Vio P arameter Input Offs et Voltage (R S = 50) o TL072 Tamb = 25 C TL072A TL072B TL072 Tmin. Tamb Tmax. TL072A TL072B Input Offs et Voltage Drift Input Offs et Current * o Tamb = 25 C Tmin. Tamb Tmax. Input Bias Current * o Tamb = 25 C Tmin. Tamb Tmax. Large Signal Voltage Gain (RL = 2k, VO = ±10V) Tamb = 25oC Tmin. Tamb Tmax. Supply Voltage R ejection Ratio (R S = 50) o Tamb = 25 C Tmin. Tamb Tmax. Supply Current, per Amp, no Load Tamb = 25oC Tmin. Tamb Tmax. Input C ommon Mode Voltage R ange Common Mode Rejection Ratio (RS = 50) o Tamb = 25 C Tmin. Tamb Tmax. Output Short-circuit Current o Tamb = 25 C Tmin. Tamb Tmax. Output Voltage Sw ing o Tamb = 25 C Tmin. Tamb Tmax. SR tr KOV GB P Ri THD en m VO1/VO2 RL RL RL RL = = = = 2 k 10k 2 k 10k ±11 50 25 80 80 TL072I,M,AC,AI, AM,BC,BI, BM M in. Typ. 3 3 1 Max. 10 6 3 13 7 5 Min. TL072C Typ. 3 Max. mV 10 13 µV/ C 100 10 200 20 pA nA pA nA V/mV 200 25 15 70 70 2.5 2.5 ± 11 200 dB 86 86 mA 1.4 +15 -12 86 1.4 +15 -12 86 mA 10 10 10 12 10 12 8 40 60 60 10 10 10 12 10 12 8 40 60 60 V 12 13.5 12 13.5 V/µs µs % 10 2.5 4 10
12 o
Unit
DV io Iio
10 5 100 4 200 20
10 5
Ii b
20
20
Avd
SVR
ICC
2.5 2.5 V dB
Vicm CMR
80 80
70 70
Ios ±VOPP
Slew Rate ( Vin = 10V, RL = 2k, CL = 100pF, o Tamb = 25 C, unity gain) Rise Time (Vin = 20mV, RL = 2k, C L = 100pF, Tamb = 25oC, unity gain) Overshoot (Vin = 20mV, RL = 2k, C L = 100pF, o Tamb = 25 C, unity gain) Gain Bandwidth Product (f = 100kHz, Tamb = 25oC, Vin = 10mV, R L = 2k, C L = 100pF) Input Resistance Total H armonic Distortion (f = 1 kHz, AV = 20dB, RL = 2k, C L = 100pF, Tamb = 25oC, VO = 2VPP) Equivalent Input Noise Voltage (f = 1 kHz, R s = 100) Phase Margin Channel Separation (Av = 100)
16 0.1
16 0.1 10
M Hz 2.5 4 10
12
%
0.01 15 45 120
0.01 15 45 120 nV H z Degrees dB
* The input bias currents are junction leakage currents which approximately double for every 10oC increase in the junction temperature.
3/9
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