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Details, datasheet, quote on part number:TS482IDT
 
 
Part:TS482IDT
Description:100MW Stereo Headphone Amplifier
Company:ST Microelectronics, Inc.
Datasheet:Download TS482IDT datasheet   File size : 332 kB
Request For quote:  Find where to buy TS482IDT
 



Datasheet text preview:
TS482
100mW Stereo Headpho ne Amplifier
s Operating from Vcc=2V to 5.5V s 100mW into 16 at 5V s 38mW into 16 at 3.3V s 11.5mW into 16 at 2V s Switch ON/OF F click reduction circuitry s High Power Supply Rejection Ratio: 85dB at
5V PIN CONNECTIONS (top v iew)
TS48 2IS, T S482IST - Mini SO8
s High Signal-to-Noise ratio: 110dB(A) at 5V s High Crosstalk immunity: 100dB (F=1kHz) s Rail t o Rail input and output s Unity-Gain Stable s Available in MiniSO8 & SO8
OUT (1) VIN- (1) VIN+ (1) GND
1 2 3 4
8 7 6 5
VCC OUT (2) VIN- (2) VIN+ (2)
DESCRIPTION The TS482 is a dual audio power amplifier able to drive a 16 or 32 stereo headset down to low voltages. It's delivering up to 100mW per channel (into 16 loads) of continuous average power with 0.1% THD+N from a 5V power supply. The unity gain stable TS482 can be configured by external gain-setting resistors.
TS48 2ID, TS 482IDT - SO8
OUT (1) VIN- (1) VIN+ (1) GND
1 2 3 4
8 7 6 5
VCC OUT (2) VIN- (2) VIN+ (2)
T YPIC AL AP PLIC ATION SCHEM ATIC
+
2.2µF 2.2µF
+
Rin1 Cb
+
3 5 6 100k Rpol
Rin2
7 4
ORDER CODE
Part Numb er TS4 82IDT TS4 82IST Temperature Range -4 0, +8 5°C Marking S · D ·
Left In
Cin2
3.9k
220µF
3.9k Rfeed2
S = MiniSO Package ( MiniSO) - only available in Tape & R eel (ST) D = Small Outline Package ( SO) - also a vailable in T ape & Reel (DT)
March 2002
+
1µF
+ -
+
APPLICATIONS s Stereo Headphone Amplifier s Optical Storage s Computer Motherboard s PDA, organizers & Notebook computers s High end TV, Set Top Box, DVD Players s Sound Cards
Rfeed1 1µF
+
Vcc Rpol 100k 2
3.9k Vcc 8 1 + TS482 220µF + RL=32Ohms
Right In
Cin1
Cs 3.9k
Cout1 Cout2 +
RL=32 Ohms
1/23
TS482
ABSOLUTE MAXIMUM RATINGS
S ymbol VCC Vi Toper Tstg Tj R thja Su pply voltage 1) Inp ut Voltage Op erating Free Air Temperature Range Sto rage Temperature Ma ximum Junction Temperature Thermal Resistance Junction t o Am bient SO8 miniSO8 Parameter Value 6 -0.3 to V CC +0.3 -40 to + 85 -65 to +1 50 150 175 215 0.7 1 0.5 8 2 200 200 250 see note 3) W kV V mA °C Unit V V °C °C °C °C/W
Po wer D issipation 2) SO8 miniSO8 ESD Human Body Model (pin t o pin) ESD Ma chine Model - 220pF - 240pF (pin to pin) Latch-up Lat ch-up Imm unity (All pins) Lead Temperature (soldering, 10sec) Pd Ou tput S hort- Circuit Duration
1. All v oltages values are measured with respect t o the g round pin. 2. Pd h as been c alculated with Tamb = 2 5°C, T junction = 150°C . 3. Short-circuits can cause e xcessive heating. Destructive dissipation c an result from short-circuit on o ne or two amplifiers si multaneously
OPERATING CONDITIONS
S ymbol VCC RL CL VICM RTHJA Su pply Voltage Load Resistor Load Capacitor R L = 16 to 100 R L > 100 Common Mode Inp ut Voltage Range Thermal Resistance Junction t o Am bient SO8 miniSO8 Parameter Value 2 to 5.5 16 - 32 400 100 GND t o VCC 150 190 Unit V pF V °C/W
Com ponents Rin Cin R feed Cs Cb Cout Rpol Av
Functiona l Descript ion Inv erting input resist or w hich s ets the closed loop gain in c onjunction with Rfeed. Th is res istor also for ms a high pass filter with C in (fc = 1 / (2 x P i x Rin x Cin)) Inp ut coupling capacitor which blocks the DC voltage at t he am plifier input term inal Fe ed back res istor which sets the c losed loop gain in conjunction with Rin Su pply Bypass capacitor which provides power supply filt ering By pass capacitor w hich provides half supply fi ltering Ou tput coupling capacitor which blocks t he DC voltage at the load input t erminal Th is capacitor also forms a high pass filte r with RL (fc = 1 / (2 x Pi x RL x Cout)) Th ese 2 resistors form a voltage divider which provide a DC biasing voltage (Vcc/2) for the 2 amplifiers. Closed loop g ain = -Rf eed / Rin
2/23
TS482
ELECTRICAL CHARACTERISTICS VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Sy mbo l ICC VIO IIB Parameter Supply C urrent No input si gnal, no load Input Offset Voltage (VICM = VCC/2) Input Bias Current (VICM = VCC/2) Output Power THD+ N THD+ N THD+ N THD+ N = = = = 0.1% Max, F = 1kHz, RL 1% M ax, F = 1kHz, R L = 0.1% Max, F = 1kHz, RL 1% M ax, F = 1kHz, R L = = 32 32 = 16 16 M in. Typ. 5.5 1 200 Max. 7.2 3 500 Un it mA mV nA
PO
60 95
65 67.5 100 107
mW
THD + N
Total Harmonic Distortion + Noise (Av= -1) 1 ) R L = 32, Po ut = 60mW, 20Hz F 20kHz R L = 16, Po ut = 90mW, 20Hz F 20kHz Power Supply Rejection Ratio (Av=1) F = 1 00Hz , Vripple = 100mVpp Max Outp ut Current THD + N < 1%, R L = 16 connected bet ween out and VCC/ 2 Output Swing VOL : RL = 32 VOH : R L = 32 VOL : RL = 16 VOH : R L = 16 Signal-to-Noise Ratio (Filter Type A , Av=-1) (RL = 32, THD + N < 0.2%, 20Hz F 20kHz) Channel Separation, R L = 32 F = 1kHz F = 20Hz to 2 0kHz Channel Separation, R L = 16 F = 1kHz F = 20Hz to 2 0kHz Input Capacitance Gain Bandwidth Product ( RL = 32) Slew Rate, Unity Ga in Inv erting (RL = 16) 1.35 0.45 106
0.03 0.03 85 120
%
P SRR IO
dB mA
VO
0.48 4.5 0.65 4.2 95
0.4 4.6 0.55 4.4 110
V
S NR
dB
Crosstalk
100 80 100 80 1 2.2 0.7
dB
CI G BP SR
pF MH z V/µs
1. Fig. 68 to 79 s how dispersion of these parameters.
3/2 3