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Part: UC2844B

Category:
 Power Management
   -> PWM Power Supply

Description: High Performance Current Mode PWM Controller

Company: ST Microelectronics, Inc.

Datasheet: Download UC2844B datasheet     File size : 216 kB

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Datasheet text preview:
®
UC2842B/3B/4B/5B UC3842B/3B/4B/5B
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
. . . . . . . . .
TRIMMED OSCILLATOR FOR PRECISE FREQUENCY CONTROL OSCILLATOR FREQUENCY GUARANTEED AT 250kHz CURRENT MODE OPERATION TO 500kHz AUTOMATIC FEED FORWARD COMPENSATION LATCHING PWM FOR CYCLE-BY-CYCLE CURRENT LIMITING INTERNALLY TRIMMED REFERENCE WITH UNDERVOLTAGE LOCKOUT HIGH CURRENT TOTEM POLE OUTPUT UNDERVOLTAGE LOCKOUT WITH HYSTERESIS LOW START-UP AND OPERATING CURRENT
Minidip
SO 8
comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N-Channel MOSFETs, is low in the offstate. Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle ranges. The UC3842B and UC3844B have UVLO thresholds of 16V (on) and 10V (off), ideally suited off-line applications The corresponding thresholds for the UC3843B and UC3845B are 8.5 V and 7.9 V. The UC3842B and UC3843B can operate to duty cycles approaching 100%. A range of the zero to < 50 % is obtained by the UC3844B and UC3845B by the addition of an internal toggle flip flop which blanks the output off every other clock cycle.
DESCRIPTION The UC384xB family of control ICs provides the necessary features to implement off-line or DC to DC fixed frequency current mode control schemes with a minimal external parts count. Internally implemented circuits include a trimmed oscillator for precise DUTY CYCLE CONTROL under voltage lockout featuring start-up current less than 0.5mA, a precision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM
B L O C K DIAGRAM (toggle flip flop used only in UC3844B and UC3845B)
Vi 7 34V GROUND 5 UVLO S/R 5V REF INTERNAL BIAS VREF GOOD LOGIC RT/CT 4 OSC ERROR AMP. 2R R 1V T
8
VREF 5V 50mA
2.50V
6
OUTPUT
VFB COMP CURRENT SENSE
2 1 3
+ -
S R CURRENT SENSE COMPARATOR PWM LATCH
UC3842B
D95IN331
March 1999
1/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
ABSOLUTE MAXIMUM RATINGS
S y mb o l Vi Vi IO EO P ar a m e te r Supply Voltage (low impedance source) Supply Voltage (Ii < 30mA) Output Current Output Energy (capacitive load) Analog Inputs (pins 2, 3) Error Amplifier Output Sink Current Ptot Ptot Tstg TJ TL Power Dissipation at Tamb 25 °C (Minidip) Power Dissipation at Tamb 25 °C (SO8) Storage Temperature Range Junction Operating Temperature Lead Temperature (soldering 10s) Va l u e 30 Self Limiting ±1 5 ­ 0.3 to 5.5 10 1.25 800 ­ 65 to 150 ­ 40 to 150 300 A µJ V mA W mW °C °C °C Unit V
* All voltages are with respect to pin 5, all currents are positive into the specified terminal.
P I N CONNECTION (top view) M i n i d i p / SO 8
COMP VFB ISENSE RT/CT
1 2 3 4
D95IN332
8 7 6 5
VREF Vi OUTPUT GROUND
PIN FUNCTIONS
No 1 2 3 4 5 6 7 8 Function COMP VFB ISENSE RT/CT GROUND OUTPUT VCC Vref Description This pin is the Error Amplifier output and is made available for loop compensation. This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and cpacitor CT to ground. Operation to 500kHz is possible. This pin is the combined control circuitry and power ground. This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sunk by this pin. This pin is the positive supply of the control IC. This is the reference output. It provides charging current for capacitor C T through resistor RT.
ORDERING NUMBERS
SO8 UC2842BD1; UC2843BD1; UC2844BD1; UC2845BD1; UC3842BD1 UC3843BD1 UC3844BD1 UC3845BD1 Minidip UC2842BN; UC2843BN; UC2844BN; UC2845BN; UC3842BN UC3843BN UC3844BN UC3845BN
2/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
THERMAL DATA
S y mb o l Rth j-amb D e sc r i p ti o n Thermal Resistance Junction-ambient. max. M in i d i p 100 SO8 150 U n it °C/W
ELECTRICAL CHARACTERISTICS ( [note 1] Unless otherwise stated, these specifications apply for -25 < Tamb < 85°C for UC284XB; 0 < Tamb < 70°C for UC384XB; Vi = 15V (note 5); RT = 10K; CT = 3.3nF)
Symbol P a r a m et e r T es t Conditions U C 2 84 X B U C 3 8 4 XB U ni t M in. Ty p. Max. Mi n. Typ. Max. 4.95 5.00 5.05 4.90 5.00 5.10 2 3 0.2 4.9 50 5 -30 49 Tj = 25°C 48 TA = Tlow to Thigh TJ = 25°C (RT = 6.2k, CT = 1nF) 225 ­ ­ ­ 7.8 7.5 TA = Tlow to Thigh (peak to peak) 25 -30 49 48 225 ­ ­ ­ 7.8 7.6 5.1 4.82 50 5 25 20 25 2 3 0.2 5.18 20 25 V mV mV mV/°C V µV mV mA KHz KHz KHz % % V mA mA V µA dB MHz dB mA mA V 1.1 V
REFERENCE SECTION VREF Output Voltage VREF VREF Line Regulation Load Regulation
Tj = 25°C Io = 1mA 12V Vi 25V 1 Io 20mA (Note 2) Line, Load, Temperature 10Hz f 10KHz Tj = 25°C (note 2) Tamb = (note 2) 125°C, 1000Hrs
VREF/T Temperature Stability Total Output Variation eN Output Noise Voltage Long Term Stability ISC Output Short Circuit
-100 -180 52 ­ 250 0.2 1 1.6 8.3 ­ 55 56 275 1 ­ ­ 8.8 8.8
-100 -180 52 ­ 250 0.2 0.5 1.6 8.3 ­ 55 56 275 1 ­ ­ 8.8 8.8
OSCILLATOR SECTION fOSC Frequency
fOSC/V fOSC/T VOSC Idischg
Frequency Change with Volt. VCC = 12V to 25V Frequency Change with Temp. Oscillator Voltage Swing
Discharge Current (VOSC =2V) TJ = 25°C TA = Tlow to Thigh VPIN1 = 2.5V VFB = 5V 2V Vo 4V TJ = 25°C 12V Vi 25V VPIN2 = 2.7V VPIN1 = 1.1V VPIN2 = 2.3V VPIN1 = 5V VPIN2 = 2.3V; RL = 15K to Ground VPIN2 = 2.7V; RL = 15K to Pin 8 (note 3 & 4) VPIN1 = 5V (note 3) 12 Vi 25V (note 3)
ERROR AMP SECTION V2 Input Voltage Ib BW PSRR Io Io Input Bias Current AVOL Unity Gain Bandwidth Power Supply Rejec. Ratio Output Sink Current Output Source Current VOUT High VOUT Low CURRENT SENSE SECTION GV Gain V3 SVR Ib Maximum Input Signal Supply Voltage Rejection Input Bias Current Delay to Output
2.45 2.50 2.55 2.42 2.50 2.58 -0.1 65 0.7 60 2 -0.5 5 90 1 70 12 -1 6.2 0.8 1.1 -1 65 0.7 60 2 -0.5 5 -0.1 90 1 70 12 -1 6.2 0.8 -2
2.85 0.9
3 1 70 -2 150
3.15 2.85 1.1 -10 300 0.9
3 1 70 -2 150
3.15 1.1 -10 300
V/V V dB µA ns
3/15


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