Details, datasheet, quote on part number: UPSD3212C
CategoryMicrocontrollers => 8 bit
Description8-bit Microcontrollers
Flash programmable system device with 8032 MCU with USB and programmable logic
CompanyST Microelectronics, Inc.
DatasheetDownload UPSD3212C datasheet
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Features, Applications
Flash programmable system devices with 8032 MCU and USB and programmable logic

Fast 8-bit 8032 MCU ­ 40 MHz V, 24 MHz V ­ Core, 12-clocks per instruction Dual Flash memories with memory management ­ Place either memory into 8032 program address space or data address space ­ Read-while-write operation for inapplication programming and EEPROM emulation ­ Single voltage program and erase 100 K minimum erase cycles, 15-year retention Clock, reset, and supply management ­ Normal, idle, and power down modes ­ Power-on and low voltage reset supervisor ­ Programmable watchdog timer Programmable logic, general-purpose ­ 16 macrocells ­ Implements state machines, glue-logic, etc. Timers and interrupts ­ Three 8032 standard 16-bit timers ­ 10 Interrupt sources with two external interrupt pins A/D converter ­ Four channels, 8-bit resolution, 10 µs Device summary

Max. clock 2nd 8032 SRAM GPIO USB VCC (V) (MHz) Flash bus KB No Yes No Yes No Yes Pkg. Temp. LQFP52 (T) 52-lead, thin, quad flat package

Communication interfaces ­ USB v1.1, low-speed 1.5 Mbps, 3 endpoints ­ I2C master/slave bus controller ­ Two UARTs with independent baud rate ­ Six I/O ports with to 46 I/O pins ­ 8032 address/data bus available on TQFP80 package ­ 5 PWM outputs, 8-bit resolution JTAG in-system programming ­ Program the entire device in as little as 10 seconds Single supply voltage 3.6 V ECOPACK® packages

Accumulator. 17 B register. 17 Stack pointer. 17 Program counter. 18 Program status word. 18 Registers R0~R7. 18 Data pointer register. 18

Program memory. 19 Data memory. 19 RAM. 19 XRAM-PSD. 20 SFR. 20 Addressing modes. 21

Direct addressing. 21 Indirect addressing. 21 Register addressing. 22 Register-specific addressing. 22 Immediate constants addressing. 22 Indexed addressing. 22

Arithmetic instructions. 23 Logical instructions. 24 Data transfers. 25
2.11.2 2.11.3 Internal RAM. 25 External RAM. 27 Lookup tables. 28

External Int0 interrupt. 42 Timer 0 and 1 interrupts. 42 Timer 2 interrupt. 42 I2C interrupt. 42 External Int1 interrupt. 43 USB interrupt. 43 USART interrupt. 43 Interrupt priority structure. 44 Interrupt enable structure. 45 How interrupts are handled. 47

Idle mode. 48 Power-down mode. 48 Power control register. 48 Idle mode. 49 Power-down mode. 49


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