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Details, datasheet, quote on part number:XD010-24S-D2F
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Datasheet text preview:
Preliminary
Product Description
The XD010-24S-D2F 10W power module is a 2-stage Class A/AB amplifier module for use in the driver stages of CDMA RF power amplifiers. The power transistors are fabricated using Sirenza's latest, high performance LDMOS process. This unit operates from a single voltage and has internal temperature compensation of the bias voltage to ensure consistant performance over the full temperature range.
Functional Block Diagram
Stage 1 Stage 2
XD010-24S-D2F
1930-1990 MHz Class A/AB 10W CDMA Driver Amplifier
Product Features
Temperature Compensation
Temperature Compensation
· · · · · · ·
5
50 W RF impedance 10W Output P1dB Single Voltage Operation High Gain: 28 dB Typical High Efficiency Advanced, XeMOS LDMOS II FETS Temperature Compensation
1
2
3
4
Applications
RF in
28 VDC
Case Flange = Ground
28 VDC
RF out
Key Specifications
P a ra me te r Frequency P1dB Gain Gain Flatness IRL Efficiency
· · · ·
Base Station PA driver Repeater CDMA GSM / EDGE
Unit MHz W dB dB dB % % % dB dB dBc nS Deg ºC/W ºC/W Min. 1930 10 28 0.4 14 26 12 6.5 -58 -70 -32 2.9 0.5 11 4 Typ. Max. 1990
Description: Test Conditions Zin = Zout = 50, VDD = 28.0V, IDD1 = 230mA, IDD2 = 150mA, TFlange = 25ºC Frequency of Operation Output Power at 1dB Compression Gain at 1W Output Power Peak to Peak Gain Variation, 1930-1990MHz Input Return Loss 1W Output Power, 1930-1990MHz Drain Efficiency at 10W CW output Drain Efficiency at 2W CDMA (Single Carrier IS-95) Drain Efficiency at 1W CDMA (Single Carrier IS-95) ACPR at 1W CDMA Power Output (Single Carrier IS-95)
Linearity Delay Phase Linearity RTH, j-l RTH, j-2
ALT-1 at 2W CDMA (Single Carrier IS-95) 3rd Order IMD at 10W PEP (Two Tone; 1MHz) Signal Delay from Pin 1 to Pin 5 Deviation from Linear Phase (Peak to Peak) Thermal Resistance Stage 1 (Junction to Case) Thermal Resistance Stage 2 (Junction to Case)
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 1
http://www.sirenza.com EDS-102932 Rev B
Preliminary XD010-24S-D2F 1930-1990 MHz 10W
Pin Out Description
Pin # 1 2 3,4 5 Flange Functio n RF Input VDD1 VDD2 RF Output Gnd Description Module RF input. Care must be taken to protect against video transients that may damage the active devices. This is the bias feed for the 1st stage of the amplifier module. The gate bias is temperature compensated to maintain constant current over the operating temperature range. See Note 1. This is the bias feed for the 2nd stage of the amplifier module. The gate bias is temperature compensated to maintain constant current over the operating temperature range. See Note 1. Module RF output. Care must be taken to protect against video transients that may damage the active devices. Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for optimum thermal and RF performance. See mounting instructions for recommendation.
Simplified Device Schematic
2 Vdd1
3
4 Vdd2
Temperature Compensation Temperature Compensation
RF in 1
Q1
Q2
RF out 5
Case Flange = Ground
Absolute Maximum Ratings
Parameters 1st Stage Bias Voltage (VDD1 ) 2nd Stage Bias Voltage (VDD2) RF Input Power Load Impedance for Continuous Operation Without Damage Output Device Channel Temperature Lead Temperature During Solder Reflow Operating Temperature Range Storage Temperature Range Value 28 28 +2 0 5:1 +200 +210 -20 to +90 -40 to +100 Unit V V dBm VSWR ºC ºC ºC ºC
Note 1:
The internal generated gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can only be provided with AGC external to the module.
Note 2:
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the drain leads to accommodate time-varying waveforms.
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging and testing devices must be observed.
522 Almanor Ave., Sunnyvale, CA 94085 Phone: (800) SMI-MMIC 2 http://www.sirenza.com EDS-102932 Rev B
Preliminary XD010-24S-D2F 1930-1990 MHz 10W
Gain, Output Power and Efficiency vs. Input Power Freq=1960 MHz, Vdd=28 V, TFlange= 25°C
35 Gain (dB), Output Power (W), Efficiency (%) 30
Gain (dB), Efficiency (%) 35 30
Gain, Efficiency and ACPR vs. Frequency Freq=1960 MHz, Vdd=28 V, TFlange= 25°C Output Power=2 Watts
-25 -30 -35
25 20 15 10 5 0 0
Pout Gain Efficiency
25 Gain 20 15 10 5 0 1920 Efficiency ACPR
-40 -45 -50 -55 -60 2000
1930
1940
1950
1960
1970
1980
1990
0.002
0.004
0.006 Input Power (W)
0.008
0.01
0.012
Frequency (MHz)
Gain and Efficiency vs. Output Power and Temperature Freq=1960 MHz, Vdd=28 V, TFlange=-20°C, 25°C, 90°C
35 30 25 Gain (dB) 20 15 10 5 0 0 2 4 6 Output Power (W) 8 10 12 Gain @-20°C Gain @ 25°C Gain @ 90°C Efficiency @-20°C Efficiency @ 25°C Efficiency @ 90°C 5 0 35 30 25 20 15 10 Efficiency (%) Gain (dB), Efficiency (%) 35 30 25 20 15 10 5 0 0
Gain and Efficiency vs. Output Power and Voltage Freq=1960 MHz, Vdd=24V, 28 V, 32 V TFlange= 25°C
Gain @ 24 VDC Gain @ 28 VDC Gain @ 32 VDC Efficiency @ 24 VDC Efficiency @ 28 VDC Efficiency @ 32 VDC 2 4 6 Output Power (W) 8 10 12
0 -10 -20 ACPR (dB) -30 -40 -50 -60 -70 0
ACPR and ALT1 vs. Output Power and Temperature Freq=1960 MHz IS-95 Vdd=28 V, TFlange=-20°C, 25°C, 90°C ACPR 885 kHz, 30 kHz ALT1 1.25 MHz, 30 kHz
ACPR @ 25°C ACPR @-20°C ACPR @ 90°C ALT1 @-20°C ALT1 @ 25°C ALT1 @ 90°C
Two Tone IMD vs. Output Power and Temperature Freq=1960, 1961 MHz, Vdd=28 V, TFlange=-20 C, 25 C, 90 C
-30 -40 -50 -60 -70 -80
-50 0 -10 -20 IMD @ 25 C IMD @ 90 IMD @ -20
o o o
ALT1 (dB)
IMD (dBc)
-30 -40
-90
-60
-100 0.5 1 1.5 2 2.5 Output Power (W)
0
1
2
3 Output Power, Avg (W)
4
5
6
522 Almanor Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC 3
http://www.sirenza.com EDS-102932 Rev B
ACPR (dB)
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