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Details, datasheet, quote on part number:HV3527PG
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Datasheet text preview:
HV3527 275V, 64-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs
Ordering Information
Package Options Device HV3527 Recommended Operating VPP Max 275V 80-Lead Quad Plastic Gullwing HV3527PG
Features
s HVCMOS® technology s Output voltages up to 275V s Low power level shifting s Shift register speed 6MHz @ VDD = 5V s Latched data outputs s Output polarity and blanking s CMOS compatible inputs s Forward and reverse shifting options
General Description
(Not recommended for new designs. Please use HV507 with improved performance.) The HV35 is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a printer driver for electrostatic applications. It can also be used in any application requiring multiple output high voltage, low current sourcing and sinking capabilities. The device consists of a 64-bit shift register, 64 latches, and control logic to perform the polarity select and blanking of the outputs. A DIR pin controls the direction of data shift through the device. With DIR grounded, DIOA is Data-In and DIOB is Data-Out; data is shifted from HVOUT64 to HVOUT1. When DIR is at logic high, DIOB is Data-In and DIOA is Data-Out: data is then shifted from HVOUT1 to HVOUT64. Data is shifted through the shift register on the low to high transition of the clock. Data output buffers are provided for cascading devices. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) is high. The data in the latch is stored during LE transition from high to low. A bias pin is used to ensure that the device operates at full VPP voltage.
Absolute Maximum Ratings1
Supply voltage, VDD Supply voltage, VPP Logic input levels Ground current2 current2 dissipation3 -0.5V to +6V VDD to 300V -0.5V to VDD +0.5V 1.5A 1.3A 1200mW 0°C to +70°C -65°C to +150°C
High voltage supply
Continuous total power
Operating temperature range Storage temperature range
Notes: 1. All voltages are referenced to GND. 2. Connection to all power and ground pads is required. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25°C ambient derate linearly to 85°C at 15mW/°C.
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HV3527
Electrical Characteristics (over recommended operating conditions unless noted)
DC Characteristics
Symbol IDD IDDQ IPP IIH IIL VOH VOL VOC Parameter VDD Supply Current Quiescent VDD Supply Current High Voltage Supply Current Min Typ Max 25 Units mA µA mA mA µA µA V V 10 1.0 VPP +1.5 -1.5 V V V V Conditions fCLK = 6MHz, fDATA = 3MHz LE = LOW 200 0.50 0.50 High-Level Logic Input Current Low-Level Logic Input Current High-Level Output HVOUT Data Out Low-Level Output HVOUT Data Out HVOUT Clamp Voltage 200 VDD -1V 10 -10 All VIN = 0V or VDD VPP = 275V All outputs high VPP = 275V All outputs low VIH = VDD VIL = 0V VPP = 275V, IHVOUT = -1mA IDOUT = -100µA IHVOUT = 1mA, VDD = 5V IDOUT = 100µA IOL = +5mA IOL = -5mA
AC Characteristics1,2 (For VDD = 5V; VPP = 275V, TA = 25°C)
Symbol fCLK tW tSU tH tWLE tDLE tSLE tON, tOFF tDHL tDLH tr, tf Clock Frequency Clock Width High and Low High 83 35 30 80 35 40 1.5 110 160 5 Parameter Min Typ Max 6 Units MHz ns ns ns ns ns ns µs ns ns ns CL = 20pF CL = 20pF CL = 20pF Conditions
Data Setup Time Before Clock Rises Data Hold Time After Clock Rises Width of Latch Enable Pulse LE Delay Time Rising Edge of Clock LE Setup Time Before Rising Edge of Clock Time from Latch Enable to HVOUT Delay Time Clock to Data High to Low Delay Time Clock to Data Low to High All Logic Inputs
Notes: 1. Shift register speed can be as low as DC as long as Data Set-up and Hold Time meet the spec. 2. AC Characteristics are guaranteed only under VDD = 5V.
Recommended Operating Conditions
Symbol VDD VPP VIH VIL TA Logic supply voltage High voltage supply High-level input voltage Low-level input voltage Operating free-air temperature Parameter Min 4.5 60 VDD -0.9 0 0 Typ 5.0 Max 5.5 275 VDD 0.9 +70 Units V V V V °C
Notes: Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. 4. Apply VPP. Power-down sequence should be the reverse of the above.
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HV3527
Input and Output Equivalent Circuits
VDD VDD VPP
Input
Data Out
HVOUT
GND Logic Inputs
GND Logic Data Output
GND High Voltage Outputs
Switching Waveforms
VIH D a t a Input 50% tSU Clock 50% tWL ( D IOA/ D IOB) D a t a OUT tDLH 50% tDHL VOH VOL 50% tWH 50% VOL D a t a Valid tH VIH 50% 50% VIL VOH 50% VIL
L a t c h Enable tDLE
50% tWLE
50% tSLE
VIH VOL
H V OUT w / S/R LOW tOFF H V OUT w / S/R HIGH
90% 10%
VOH VOL
10% tON
90%
VOH VOL
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