|
Details, datasheet, quote on part number:HV4622
| |
| Part: | HV4622 |
| Category: | Power Management => Power Distribution/Switches => Drivers => High Voltage Driver |
| Description: | Source Only Outputs Open Drain P-channel |
| Company: | Supertex, Inc. |
| Datasheet: | Download HV4622 datasheet File size : 55 kB |
| Request For quote: | Find where to buy HV4622
|
| |
Datasheet text preview:
HV4522 HV4622
32-Channel Serial To Parallel Converter with P-Channel Open Drain Outputs Ordering Information
Device HV4522 HV4622 Recommended Operating VPP Max -220 -220 Package Options 44 J-Lead Quad Ceramic Chip Carrier HV4522DJ HV4622DJ 44 J-Lead Quad Plastic Chip Carrier HV4522PJ HV4622PJ 44 Quad Plastic Gullwing HV4522PG HV4622PG Die HV4522X HV4622X
Features
Processed with HVCMOS Technology Output voltages to -220V Source current minimum 60 mA Shift register speed 8 MHz Polarity and blanking inputs CMOS compatible inputs Forward and reverse shifting options 44-lead plastic and ceramic surface mount packages Hi-Rel processing available Can be used with the HV55 and HV56 to provide 220V push pull operation
General Description
The HV4522 and HV4622 are low-voltage serial to high-voltage parallel converters with P-Channel open drain outputs. These devices have been designed for use as drivers for AC-electroluminescent displays. They can also be used in any application requiring multiple output high-voltage current source capabilities such as driving inkjet and electrostatic print heads, plasma panels, or vacuum fluorescent displays. These devices consist of a 32-bit shift register, 32 data latches, and control logic to perform polarity and blanking functions. Data is shifted through the shift register on the logic high-to-low transition of the clock. The HV4522 shifts in the counterclockwise direction when viewed from the top of the package and the HV4622 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. The data in the shift register is latched when the latch enable pin is brought to logic high and then returned to ground. If the latch enable pin is held high, the latch becomes transparent and the shift register data is directly reflected in the outputs. For applications requiring active pull down as well as pull up, the HV4522 and HV4622 can be paired with the HV55 and HV56 devices, respectively.
Absolute Maximum Ratings1
Supply voltage, VDD Off state output voltage Logic input levels Ground current2 dissipation 3 Plastic Ceramic HV4522/ HV4622 +0.5V to -16V +0.5V to -240V
+0.5V to VDD - 0.3V 1.5A 1200mW 1500mW
Continuous total power
Operating temperature range Storage temperature range Lead temperature 1.6mm (1/16 inch) from case for 10 seconds
Ceramic -55°C to +125°C Plastic -40°C to +85°C -65°C to +150°C 260°C
Notes: 1. All voltages are referenced to VSS. 2. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25°C ambient derate linearly to maximum operating temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.
05/01/03
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
HV4522/HV4622
Electrical Characteristics1 (over recommended operating conditions unless noted)
DC Characteristics
Symbol I DD I DDQ I O(OFF) IIH IIL VOH VOL VOC Parameter VDD supply current Quiescent VDD supply current Off state output current High-level logic input current Low-level logic input current High-level output data out Low-level output voltage HVOUT Data out HVOUT clamp voltage VDD + 1.0V -30.0 -1.0 +1.5 Min Max -15 -100 -100 -1 +1 Units mA µA µA µA µA V V V V Conditions fCLK = 8 MHz FDATA = 4 MHz VIN = VSS or VDD All SWS parallel VIH = VDD VIL = VSS IDout = -100µA IHVout = -60mA IDout = -100µA IOL = +60mA
AC Characteristics (VDD = -12V, TC = 25°C)
Symbol fCLK tWH/tWL tSU tH tON tDHL tDLH tDLE tWLE tSLE Parameter Clock frequency Clock width high or low Data set-up time before clock rises Data hold time after clock rises Turn ON time, HVOUT from enable Delay time clock to data high to low Delay time clock to data low to high Delay time clock to LE low to high Width of LE pulse LE set-up time before clock falls 50 50 50 62 50 20 400 100 100 Min Max 8 Units MHz ns ns ns ns ns ns ns ns ns RL = 10K to VOO MAX CL = 15pF CL = 15pF Conditions
Recommended Operating Conditions
Symbol VDD HVOUT VIH VIL fCLK TA Logic supply voltage Output off voltage High-level input voltage (LOGIC "1") Low-level input voltage (LOGIC "0") Clock frequency Operating free-air temperature Plastic Ceramic
Note: All voltages are referenced to VSS.
Parameter
Min -10.8 HV4522 and HV4622 +0.3 VDD + 2V 0
Max -13.2 -220 VDD -2.0 8
Units V V V V MHz °C °C
-40 -55
+85 +125
2
HV4522/HV4622
Input and Output Equivalent Circuits
VSS VSS
VSS
Input
Data Out
HVOUT
VDD Logic Inputs
VDD Logic Data Output High Voltage Output
Switching Waveforms
VSS D a t a Input 50% tSU Clock 50% tWH 50% tWL 50% VSS-12 D a t a Out tDHL 50% tDLH VSS VSS-12 D a t a Valid tH VSS 50% 50% VSS-12 VSS 50% VSS-12
L a t c h Enable tDLE
50% tWLE
50% tSLE
VSS VSS-12
H V OUT w / S/R HIGH
VSS 10% tON VOO
3
|
|
