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Details, datasheet, quote on part number:VQ7254
 
 
Part:VQ7254
Description:
Company:Supertex, Inc.
Datasheet:Download VQ7254 datasheet   File size : 46 kB
Request For quote:  Find where to buy VQ7254
 



Datasheet text preview:
/VQ7254 VQ3001 ­ SOLETE ­ OB
N- and P-Channel Quad Power MOSFET Arrays
Ordering Information
BVDSS / BVDGS 40V 40V 20V RDS (ON) (max) Q1 + Q2 or Q3 + Q4 3.0 3.0 3.0 VGS (th) (max) N-Channel 2.0V 1.6V 2.0V P-Channel -3.0V -2.4V -3.0V Order Number / Package 14-Pin P-Dip VQ3001N6 -- VQ7254N6 14-Pin C-Dip* -- TQ3001N7 --
TQ3001 VQ3001 VQ7254
* 14 pin side brazed ceramic DIP
High Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process Flows and Ordering Information.
Advanced DMOS Technology
These enhancement-mode (normally-off) DMOS FET arrays utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex quad arrays use four independent DMOS transistors. They are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
9
Features
Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-channel devices Low threshold version available
Pin Configuration
D1 S1 G1 NC
1 2 3 4 5 6 7 14 13
Applications
Telecom switches Logic level interfaces Battery operated systems Photo voltaic drives Soild state relays Motor controls D4 S4 G4 NC G3 S3 D3 NQ1 PQ 4
12 11 10
Absolute Maximum Ratings
Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * Distance of 1.6 mm from case for 10 seconds. 9-23 BVDSS BVDGS ± 30V -55°C to +150°C 300°C
G2 S2 D2
PQ 2
NQ3
9 8
top view 14-pin DIP
TQ3001/VQ3001/VQ7254
Thermal Characteristics
Package Ceramic Dip Plastic Dip * Total for 4 die. Each die. ID (continuous) N P 1.6A 1.4A -0.75A -0.65A ID (pulsed) N P 3.0A 3.0A -3.0A -3.0A Power Dissipation* @ TC = 25°C 2.0W 1.5W
j c °C/W
62.5 83.3
j a °C/W
31.2 41.6
IDR N 1.6A 1.4A P -0.75A -0.65A N
IDRM P -3.0A -3.0A 3.0A 3.0A
Electrical Characteristics (@ 25°C unless otherwise specified)
N-Channel Symbol BVDSS Parameter Drain-to-Source Breakdown Voltage VGS(th) Gate Threshold Voltage TQ3001 VQ3001 VQ7254 VQ3001 VQ7254 TQ3001 VQ7254 IGSS IDSS Gate Body Leakage Zero Gate Voltage Drain Current 0.6 0.65 100 10 500 VDS (ON) Total Static Drain-to-Source ON-State Voltage Total Static Drain-to-Source ON-State Resistance VQ3001 TQ3001 VQ7254 RDS (ON) TQ3001 VQ3001 TQ3001 VQ7254 GFS CISS COSS CRSS t (ON) t (OFF) VSD Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-ON Time Turn-OFF Time Forward ON Voltage VQ7254 VQ3001 TQ3001
Notes: 1. All D.C. parameters 100% tested (pulse test: 300µs pulse, 2% duty cycle). 2. All A.C. parameters sample tested. 3. Refer to device types TN06L and TP06L for characteristic curves.
P-Channel Min -40 -20 Max Unit V Test Conditions VGS = 0V, ID = 10µA
Min 40 20 0.8
Max
2.5 1.6
-0.8 -1.0 -0.65
-4.5 -2.4
V V V
VGS = VDS, ID = 1mA TA = 25°C VGS = VDS, ID = 1mA TA = 85°C VGS = ±20V, VDS = 0V VGS = 0V, VDS = 0.8 Min. Rating VGS = 0V, VDS = 0.8 Min. Rating, TA = 125°C VGS = 11.4V, ID = 1A VGS = 5.0V, ID = 250mA
-100 -10 -500
nA µA µA
1.0 1.0 1.5 1.0 1.0 200 190 110 50 30 30 1.8 1.8 200
-2.0 V -2.0 3.5 2.0 2.0 m 195 120 60 30 30 -2.0 -2.0 ns ns V pF VGS = 0V, VDS = 20V f = 1Mz VDD = 15V, ID = 0.65A, RGEN = 25 VGS = 0V, IF = 1.5A VGS = 0V, IF = 1.5A VGS = 11.4V, ID = 1A
4 1/VQ725 VQ300 OLETE ­ ­ OBS
9-24
VDS = 10V, ID = 0.5A
TQ3001/VQ3001/VQ7254
Switching Waveforms and Test Circuit
10V
VDD
90% INPUT
0V
RL
PULSE GENERATOR
Rgen
OUTPUT
10%
t(ON)
t(OFF) tr td(OFF) tF
td(ON)
VDD
D.U.T.
10%
10%
INPUT
OUTPUT
0V
90%
90%
FET polarity in test circuit is N-channel only.
/VQ7254 VQ3001 ­ SOLETE ­ OB
9
9-25