|
|
Part: 54ACT11253
Category:
Logic
-> Multiplexers/Demultiplexers
-> Multiplexers->CMOS/BiCMOS->AC/ACT Family
Description: Dual 1-of-4 Data Selectors/multiplexers With 3-state Outputs
Company: Texas Instruments, Inc.
Datasheet: Download 54ACT11253 datasheet File size : 275 kB
Request For quote: Find where to buy 54ACT11253
Datasheet text preview:
54ACT11253, 74ACT11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
SCAS040A D3110, MARCH 1988 REVISED APRIL 1993
· · · · · · · ·
description
Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low-impedance of the single enabled output will drive the bus line to a high or low logic level. Each output has its own strobe (G). The outputs are disabled when G is high. The 54ACT11253 is characterized for operation over the full military temperature range of 55°C to 125°C. The 74ACT11253 is characterized for operation from 40°C to 85°C.
FUNCTION TABLE SELECT INPUTS B X L L L L H H H H A X L L H H L L H H C0 X L H X X X X X X DATA INPUTS C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H OUTPUT CONTROL G H L L L L L L L L OUTPUT Y Z L H L H L H L H
1C1 1C0 NC A B
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1C2 1C3 NC V CC 2C0 2C1 2C2 NC 2C3 2G
NC No internal connection
Inputs Are TTL-Voltage Compatible 3-State Version of ACT11153 Permits Multiplexing From N Lines to One Line Performs Parallel-to-Serial Conversion Package Options Include Plastic SmallOutline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process
54ACT11253 . . . J PACKAGE 74ACT11253 . . . D OR N PACKAGE (TOP VIEW)
A B 1Y GND 2Y 1G 2G 2C3
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
1C0 1C1 1C2 1C3 VCC 2C0 2C1 2C2
t
54ACT11253 . . . FK PACKAGE (TOP VIEW)
logic symbol
1 2 0 1
A B
1G 1C0 1C1 1C2 1C3 2G 2C0 2C1 2C2 2C3
6 16 15 14 13 7 11 10 9 8
EN 0 1 2 3 3 1Y
1Y GND NC 2Y 1G
G 0 3 MUX
5
2Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages.
Address inputs A and B are common to both sections. EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
21
54ACT11253, 74ACT11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
SCAS040A D3110, MARCH 1988 REVISED APRIL 1993
logic diagram (positive logic)
1G 6
1C0
16
1C1 Data 1 1C2
15 3 14 1Y
1C3 B Select A 2C0
13 2
1 11
2C1 Data 2 2C2
10 5 9
2Y
2C3
8
2G
7
Pin numbers shown are for the D, J, and N packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.
22
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
54ACT11253, 74ACT11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
SCAS040A D3110, MARCH 1988 REVISED APRIL 1993
recommended operating conditions
54ACT11253 MIN VCC VIH VIL VI VO IOH IOL Dt /Dv TA Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature 0 55 0 0 4.5 2 0.8 VCC VCC 24 24 10 125 0 40 0 0 MAX 5.5 74ACT11253 MIN 4.5 2 0.8 VCC VCC 24 24 10 85 MAX 5.5 UNIT V V V V V mA mA ns/ V °C
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS IOH = 50 mA mA VOH IOH = 24 mA mA IOH = 50 mA IOH = 75 mA IOL = 50 mA 50 mA VOL IOL = 24 mA 24 mA IOL = 50 mA IOL = 75 mA IOZ II ICC VO = VCC or GND VI = VCC or GND VI = VCC or GND, IO = 0 One input at 3.4 V, , Other inputs at GND or VCC VI = VCC or GND VO = VCC or GND VCC 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 3.5 ± 0.5 ± 0.1 8 0.9 ± 10 ±1 160 1 0.1 0.1 0.36 0.36 0.1 0.1 0.5 0.5 1.65 1.65 ±5 ±1 80 1 MIN 4.4 5.4 3.94 4.94 TA = 25°C TYP MAX 54ACT11253 MIN 4.4 5.4 3.7 4.7 3.85 3.85 0.1 0.1 0.44 0.44 V MAX 74ACT11253 MIN 4.4 5.4 3.8 4.8 V MAX UNIT
mA mA mA
mA pF pF
DICC
Ci
Co 5V 8 Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
23
54ACT11253, 74ACT11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
SCAS040A D3110, MARCH 1988 REVISED APRIL 1993
switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B or Data (Any C) (Any C) TO (OUTPUT) Any Y Y Y Y MIN 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 TA = 25°C TYP MAX 6.8 9.1 5.7 7.2 5 4.8 6.4 5.9 9.8 12.6 7.4 10.5 7.6 7.3 8.6 7.4 54ACT11253 MIN 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 MAX 11.8 15.5 8.9 12.5 9 8.6 9.5 8.1 74ACT11253 MIN 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 MAX 11 14.3 8.3 11.7 8.5 8.1 9.2 7.8 UNIT ns ns ns ns
G G
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER Cpd Power dissipation capacitance per multiplexer Power dissipation capacitance per multiplexer Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF 50 pF, f = 1 MHz MHz TYP 42 18 UNIT pF
PARAMETER MEASUREMENT INFORMATION
2 × VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 × VCC GND
LOAD CIRCUIT
Output Control (low-level enabling) 3V Output Waveform 1 S1 at 2 × VCC (see Note C) Output Waveform 2 S1 at GND (see Note C)
3V 1.5 V tPZL tPLZ 50% VCC tPHZ 80% VCC VOH 20% VCC 1.5 V 0V
Input (see Note B) tPLH
1.5 V
1.5 V 0V tPHL VOH 50% VCC 50% VCC VOL
[ VCC
VOL
tPZH
Output
50% VCC
[0V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
24
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright © 1998, Texas Instruments Incorporated
Others parts begin by 54
54-1 54-2 54-3 54-4 54-5 54-6 54-7 54-8 54-9 54-10 54-11 54-12 54-13
|
|
|
