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Part: 5962-8550601VSA
Category:
Logic
-> Transceivers
-> Standard Transceivers
Description: ti SN54HCT245, Octal Bus Transceivers With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download 5962-8550601VSA datasheet File size : 134 kB
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SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCLS020E MARCH 1984 REVISED AUGUST 2003
D D D D D D D
Operating Voltage Range of 4.5 V to 5.5 V High-Current 3-State Outputs Drive Bus Lines Directly or Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 14 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible
SN54HCT245 . . . J OR W PACKAGE SN74HCT245 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
description/ordering information
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The 'HCT245 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC OE B1 B2 B3 B4 B5 B6 B7 B8
SN54HCT245 . . . FK PACKAGE (TOP VIEW)
A2 A1 DIR VCC OE A3 A4 A5 A6 A7
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
B1 B2 B3 B4 B5
ORDERING INFORMATION
TA PDIP N SOIC DW 40°C to 85 C 85°C SOP NS SSOP DB TSSOP PW CDIP J 55°C to 125 C 125°C CFP W LCCC FK PACKAGE Tube of 20 Tube of 25 Reel of 2000 Reel of 2000 Reel of 2000 Tube of 70 Reel of 2000 Reel of 250 Tube of 20 Tube of 85 Tube of 55 ORDERABLE PART NUMBER SN74HCT245N SN74HCT245DW SN74HCT245DWR SN74HCT245NSR SN74HCT245DBR SN74HCT245PW SN74HCT245PWR SN74HCT245PWT SNJ54HCT245J SNJ54HCT245W SNJ54HCT245FK SNJ54HCT245J SNJ54HCT245W HT245 TOP-SIDE MARKING SN74HCT245N HCT245 HCT245 HT245
SNJ54HCT245FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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A8 GND B8 B7 B6
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SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCLS020E MARCH 1984 REVISED AUGUST 2003
FUNCTION TABLE INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
logic diagram (positive logic)
DIR 1 19
OE
A1
2
18
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCLS020E MARCH 1984 REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HCT245 MIN VCC VIH VIL VI VO t/v Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage Input transition rise/fall time VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V 4.5 2 0.8 0 0 VCC VCC 500 0 0 NOM 5 MAX 5.5 SN74HCT245 MIN 4.5 2 0.8 VCC VCC 500 NOM 5 MAX 5.5 UNIT V V V V V ns
TA Operating free-air temperature 55 125 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VOH VOL II IOZ ICC ICC Ci DIR or OE DIR or OE A or B TEST CONDITIONS VI = VIH or VIL VI = VIH or VIL VI = VCC or 0 VO = VCC or 0 VI = VCC or 0, IO = 0 One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC IOH = 20 µA IOH = 6 mA IOL = 20 µA IOL = 6 mA VCC 4.5 V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 4.5 V to 5.5 V 1.4 3 MIN 4.4 3.98 TA = 25°C TYP MAX 4.499 4.3 0.001 0.17 ±0.1 ±0.01 0.1 0.26 ±100 ±0.5 8 2.4 10 SN54HCT245 MIN 4.4 3.7 0.1 0.4 ±1000 ±10 160 3 10 MAX SN74HCT245 MIN 4.4 3.84 0.1 0.33 ±1000 ±5 80 2.9 10 MAX UNIT V V nA µA µA mA pF
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC. Parameter Ci does not apply to transceiver I/O ports.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER tpd ten tdis tt FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B A or B VCC 4.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V MIN TA = 25°C TYP MAX 16 14 25 22 26 23 9 8 22 20 46 41 40 36 12 11 SN54HCT245 MIN MAX 33 30 69 62 60 54 18 16 SN74HCT245 MIN MAX 28 25 58 52 50 45 15 14 UNIT ns ns ns ns
OE OE
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3
SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCLS020E MARCH 1984 REVISED AUGUST 2003
switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1)
PARAMETER tpd ten tt FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B VCC 4.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V MIN TA = 25°C TYP MAX 20 18 36 30 17 14 30 27 59 53 42 38 SN54HCT245 MIN MAX 45 41 89 80 63 57 SN74HCT245 MIN MAX 38 34 74 67 53 48 UNIT ns ns ns
OE
operating characteristics, TA = 25°C
PARAMETER Cpd Power dissipation capacitance per transceiver TEST CONDITIONS No load TYP 40 UNIT pF
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCLS020E MARCH 1984 REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
VCC S1 RL PARAMETER ten tPZH tPZL tPHZ tPLZ 1 k RL 1 k CL 50 pF or 150 pF 50 pF 50 pF or 150 pF S1 Open Closed Open Closed Open S2 Closed Open Closed Open Open
From Output Under Test CL (see Note A)
Test Point
S2
tdis
tpd or tt LOAD CIRCUIT
Input 1.3 V 0.3 V
2.7 V
2.7 V
3V 1.3 V 0.3 V 0 V tf
tr VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES 3V Input 1.3 V tPLH In-Phase Output 1.3 V 10% tPHL Out-ofPhase Output 90% 1.3 V 10% tf 90% tr tPLH 1.3 V 10% 90% tr VOH VOL 1.3 V 0V tPHL 90% VOH 1.3 V 10% V OL tf Output Control (Low-Level Enabling)
3V 1.3 V tPZL 1.3 V 0V tPLZ VCC 1.3 V 10% tPHZ 1.3 V 90% VOH 0 V VOL
Output Waveform 1 (See Note B) tPZH Output Waveform 2 (See Note B)
VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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