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Part: 5962-8766301SSA
Category:
Logic
-> Transceivers
-> Standard Transceivers
Description: ti SN54ACT245, Octal Bus Transceivers With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download 5962-8766301SSA datasheet File size : 240 kB
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SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS452E SEPTEMBER 1994 REVISED OCTOBER 2002
D D
4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V
SN54ACT245 . . . J OR W PACKAGE SN74ACT245 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
D D
Max tpd of 8 ns at 5 V Inputs Are TTL-Voltage Compatible
SN54ACT245 . . . FK PACKAGE (TOP VIEW)
A2 A1 DIR VCC
3 4 5 6 7 8
DIR A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC OE B1 B2 B3 B4 B5 B6 B7 B8
A3 A4 A5 A6 A7
2 1 20 19 18 17 16 15
OE B1 B2 B3 B4 B5
14 9 10 11 12 13
description/ordering information
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. A high on OE disables the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION
TA PDIP N SOIC DW DW to 85°C 40°C to 85°C SOP NS SSOP DB TSSOP PW CDIP J 55°C to 125°C CFP W PACKAGE Tube Tube Tape and reel Tape and reel Tape and reel Tape and reel Tube Tube ORDERABLE PART NUMBER SN74ACT245N SN74ACT245DW SN74ACT245DWR SN74ACT245NSR SN74ACT245DBR SN74ACT245PWR SNJ54ACT245J SNJ54ACT245W TOP-SIDE MARKING SN74ACT245N ACT245 ACT245 AD245 AD245 SNJ54ACT245J SNJ54ACT245W
LCCC FK Tube SNJ54ACT245K SNJ54ACT245FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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· DALLAS, TEXAS 75265
A8 GND B8 B7 B6
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SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS452E SEPTEMBER 1994 REVISED OCTOBER 2002
FUNCTION TABLE (each transceiver) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
logic diagram (positive logic)
DIR 1 19
OE
A1
2
18
B1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
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SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS452E SEPTEMBER 1994 REVISED OCTOBER 2002
recommended operating conditions (see Note 3)
SN54ACT245 MIN VCC VIH VIL VI VO IOH IOL Dt/Dv Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate 0 0 4.5 2 0.8 VCC VCC 24 24 8 0 0 MAX 5.5 SN74ACT245 MIN 4.5 2 0.8 VCC VCC 24 24 8 MAX 5.5 UNIT V V V V V mA mA ns/V
TA Operating free-air temperature 55 125 40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS IOH = 50 mA 50 mA VOH IOH = 24 mA 24 mA IOH = 50 mA IOH = 75 mA IOL = 50 mA 50 mA VOL IOL = 24 mA 24 mA IOL = 50 mA IOL = 75 mA IOZ II ICC A or B ports OE or DIR VO = VCC or GND VI = VCC or GND VI = VCC or GND, IO = 0 One input at 3.4 V, Other inputs at GND or VCC VI = VCC or GND VO = VCC or GND VCC 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 5V 0.6 4.5 15 ±0.5 ±0.1 4 ±10 ±1 80 1.6 0.001 0.001 0.1 0.1 0.36 0.36 0.1 0.1 0.5 0.5 1.65 1.65 ±5 ±1 40 1.5 MIN 4.4 5.4 3.88 4.86 TA = 25°C TYP MAX 4.49 5.49 SN54ACT245 MIN 4.4 5.4 3.7 4.7 3.85 3.85 0.1 0.1 0.44 0.44 V MAX SN74ACT245 MIN 4.4 5.4 3.76 4.76 V MAX UNIT
mA mA mA
mA pF pF
DICC§
Ci Cio
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. For I/O ports, the parameter IOZ includes the input leakage current. § This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.
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3
SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS452E SEPTEMBER 1994 REVISED OCTOBER 2002
switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B or TO (OUTPUT) B or A or A or B or A or B or MIN 1 1 1 1 1 1 TA = 25°C TYP MAX 4 4 5 5.5 5.5 5 7.5 8 10 10 10 10 SN54ACT245 MIN 1 1 1 1 1 1 MAX 9 10 12 13 12 12 SN74ACT245 MIN 1.5 1 1.5 1.5 1 1.5 MAX 8 9 11 12 11 11 UNIT ns ns ns
OE OE
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS CL = 50 pF, f = 1 MHz TYP 45 UNIT pF
PARAMETER MEASUREMENT INFORMATION
2 × VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 × VCC Open
500
LOAD CIRCUIT
Output Control (low-level enabling) tPZL 3V Output Waveform 1 S1 at 2 × VCC (see Note B) tPZH Output Waveform 2 S1 at Open (see Note B)
3V 1.5 V 1.5 V 0V tPLZ VCC 50% VCC VOL + 0.3 V tPHZ 50% VCC VOLTAGE WAVEFORMS VOH 0.3 V VOH 0 V VOL
Input
1.5 V
1.5 V 0V
tPLH
tPHL VOH 50% VCC VOL
Output
50% VCC VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 2002, Texas Instruments Incorporated
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