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Part: 5962-87807012A

Category:
 Logic
   -> Flip-Flops
             -> D-Type Flip-Flops

Description: ti SN54HC377, Octal, Hex, And Quad D-type Flip-flops With Clock Enable

Company: Texas Instruments, Inc.

Datasheet: Download 5962-87807012A datasheet     File size : 224 kB

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Datasheet text preview:
SCLS307B­ JANUARY 1996 ­ REVISED JANUARY 2003

SN54HC377, SN74HC377 OCTAL D TYPE FLIP FLOPS WITH CLOCK ENABLE

D D D D D D D D D

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 12 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Eight Flip-Flops With Single-Rail Outputs Clock Enable Latched to Avoid False Clocking Applications Include: ­ Buffer/Storage Registers ­ Shift Registers ­ Pattern Generators

SN54HC377 . . . J OR W PACKAGE SN74HC377 . . . DW, N, OR NS PACKAGE (TOP VIEW)

CLKEN 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK

description/ordering information
These devices are positive-edge-triggered octal D-type flip-flops with an enable input. The 'HC377 devices are similar to the 'HC273 devices, but feature a latched clock-enable (CLKEN) input instead of a common clear. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse, if CLKEN is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN. ORDERING INFORMATION
TA PDIP ­ N ­40°C to 85°C to 85°C SOIC ­ DW DW SOP ­ NS CDIP ­ J ­55°C to 125 C 125°C CFP ­ W PACKAGE Tube Tube Tape and reel Tape and reel Tube Tube

SN54HC377 . . . FK PACKAGE (TOP VIEW)

1D 1Q CLKEN VCC 8Q 2D 2Q 3Q 3D 4D
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

8D 7D 7Q 6Q 6D

ORDERABLE PART NUMBER SN74HC377N SN74HC377DW SN74HC377DWR SN74HC377NSR SNJ54HC377J SNJ54HC377W

LCCC ­ FK Tube SNJ54HC377FK SNJ54HC377FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

4Q GND CLK 5Q 5D
TOP-SIDE MARKING SN74HC377N HC377 HC377 SNJ54HC377J SNJ54HC377W

1

SCLS307B­ JANUARY 1996 ­ REVISED JANUARY 2003

SN54HC377, SN74HC377 OCTAL D TYPE FLIP FLOPS WITH CLOCK ENABLE

FUNCTION TABLE (each flip-flop) INPUTS CLKEN H L L X CLK X L D X H L X OUTPUT Q Q0 H L Q0

logic diagram (positive logic)
CLKEN 1

CLK

11

C1 1D 3 1D C1 2D 4 1D C1 3D 7 1D C1 4D 8 1D C1 5D 13 1D C1 6D 14 1D C1 7D 17 1D C1 8D 18 1D

2

1Q

5

2Q

6

3Q

9

4Q

12

5Q

15

6Q

16

7Q

19

8Q

2

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SCLS307B­ JANUARY 1996 ­ REVISED JANUARY 2003

SN54HC377, SN74HC377 OCTAL D TYPE FLIP FLOPS WITH CLOCK ENABLE

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 3)
SN54HC377 MIN VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v Low-level in ut voltage input Input voltage Output voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 0 0 NOM 5 MAX 6 SN74HC377 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 400 ns V V V V NOM 5 MAX 6 UNIT V

High-level in ut voltage input

Input transition rise/fall time

TA Operating free-air temperature ­55 125 ­40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3

SCLS307B­ JANUARY 1996 ­ REVISED JANUARY 2003

SN54HC377, SN74HC377 OCTAL D TYPE FLIP FLOPS WITH CLOCK ENABLE

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS VCC 2V IOH = ­20 µA 20 VOH VI = VIH or VIL IOH = ­4 mA IOH = ­5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 ±0.1 0.1 0.1 0.1 0.26 0.26 ±100 8 10 SN54HC377 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1000 160 10 MAX SN74HC377 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1000 80 10 nA µA pF V V MAX UNIT

timing requirements over recommended operating free-air temperature range (unless otherwise noted)
VCC 2V fclock Clock frequency 4.5 V 6V 2V tw Pulse duration, CLK high or low 4.5 V 6V 2V D tsu Setup time before CLK time before CLK CLKEN high or low 4.5 V 6V 2V 4.5 V 6V 2V th Hold time after CLK CLKEN inactive or active, data , 4.5 V 6V 100 20 17 100 20 17 100 20 17 5 5 5 TA = 25°C MIN MAX 5 25 29 150 30 25 150 30 25 150 30 25 5 5 5 SN54HC377 MIN MAX 3 16 19 125 25 21 125 25 21 125 25 21 5 5 5 ns ns ns SN74HC377 MIN MAX 4 20 23 MHz UNIT

4

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SCLS307B­ JANUARY 1996 ­ REVISED JANUARY 2003

SN54HC377, SN74HC377 OCTAL D TYPE FLIP FLOPS WITH CLOCK ENABLE

switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V fmax 4.5 V 6V 2V tpd CLK Any 4.5 V 6V 2V tt Any 4.5 V 6V MIN 5 25 29 TA = 25°C TYP MAX 11 54 64 56 15 12 38 8 6 160 32 27 75 15 13 SN54HC377 MIN 3 16 19 240 48 41 110 22 19 MAX SN74HC377 MIN 4 20 23 200 40 34 95 19 16 ns ns MHz MAX UNIT

operating characteristics, TA = 25°C
PARAMETER Cpd Power dissipation capacitance per flip-flop TEST CONDITIONS No load TYP 30 UNIT pF

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

5




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