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Part: 5962-9322001QRA
Category:
Logic
-> Flip-Flops
-> D-Type (3-State) Flip-Flops
Description: ti SN54ABT574, Octal Edge-triggered D-type Flip-flops With 3-State Outputs
Company: Texas Instruments, Inc.
Datasheet: Download 5962-9322001QRA datasheet File size : 195 kB
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Datasheet text preview:
SN54ABT574, SN74ABT574A OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SCBS191F - JANUARY 1991 - REVISED SEPTEMBER 2003
D Typical VOLP (Output Ground Bounce) D D
<1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (-32-mA IOH, 64-mA IOL) Ioff Supports Partial-Power-Down Mode Operation
D Latch-Up Performance Exceeds 500 mA Per D
JEDEC Standard JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A)
SN54ABT574 . . . FK PACKAGE (TOP VIEW)
VCC
2D 1D OE VCC
19 1Q 18 2Q 17 3Q 16 4Q 15 5Q 14 6Q 13 7Q 12 8Q
OE
OE 1D 2D 3D 4D 5D 6D 7D 8D GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK
1
20
9 10 11
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ORDERING INFORMATION
TA PDIP - N QFN - RGY SOIC - DW -40°C to 85°C SOP - NS SSOP - DB TSSOP - PW VFBGA - GQN VFBGA - ZQN (Pb-free) CDIP - J -55°C to 125 C 125°C CFP - W LCCC - FK Tape and reel Tube Tube Tube PACKAGE Tube Tape and reel Tube Tape and reel Tape and reel Tape and reel Tube Tape and reel ORDERABLE PART NUMBER SN74ABT574AN SN74ABT574ARGYR SN74ABT574ADW SN74ABT574ADWR SN74ABT574ANSR SN74ABT574ADBR SN74ABT574APW SN74ABT574APWR SN74ABT574AGQNR SN74ABT574AZQNR SNJ54ABT574J SNJ54ABT574W SNJ54ABT574FK AB574A SNJ54ABT574J SNJ54ABT574W AB574A ABT574A ABT574A AB574A TOP-SIDE MARKING SN74ABT574AN AB574A
SNJ54ABT574FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
GND
CLK
On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
8D GND CLK 8Q 7Q
1D 2D 3D 4D 5D 6D 7D 8D
2 3 4 5 6 7 8
3D 4D 5D 6D 7D
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1Q 2Q 3Q 4Q 5Q 6Q
SN54ABT574 . . . J OR W PACKAGE SN74ABT574A . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW)
SN74ABT574A . . . RGY PACKAGE (TOP VIEW)
1
SCBS191F - JANUARY 1991 - REVISED SEPTEMBER 2003
SN54ABT574, SN74ABT574A OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
description/ordering information (continued)
The eight flip-flops of the SN54ABT574 and SN74ABT574A are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
SN74ABT574A . . . GQN OR ZQN PACKAGE (TOP VIEW) 1 A B C D E 2 3 4 A B C D E
terminal assignments
1 1D 3D 5D 7D GND 2 OE 3Q 4D 7Q 8D 3 VCC 2D 5Q 6D CLK 4 1Q 2Q 4Q 6Q 8Q
FUNCTION TABLE (each flip-flop) INPUTS OE L L L H CLK H or L X D H L X X OUTPUT Q H L Q0 Z
logic diagram (positive logic)
OE CLK 1 11
C1 1D 2 1D
19
1Q
To Seven Other Channels Pin numbers shown are for the DB, DW, FK, J, N, NS, PW, RGY, and W packages.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ABT574, SN74ABT574A OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SCBS191F - JANUARY 1991 - REVISED SEPTEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . -0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT574 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT574A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W (see Note 2): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54ABT574 MIN VCC VIH VIL VI IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Outputs enabled 0 4.5 2 0.8 VCC -24 48 5 0 MAX 5.5 SN74ABT574A MIN 4.5 2 0.8 VCC -32 64 5 MAX 5.5 UNIT V V V V mA mA ns/V
TA Operating free-air temperature -55 125 -40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SCBS191F - JANUARY 1991 - REVISED SEPTEMBER 2003
SN54ABT574, SN74ABT574A OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VCC = 4.5 V, VCC = 4.5 V, VCC = 5 V, VCC = 4.5 V VOL Vhys II IOZH IOZL Ioff ICEX IO§ ICC VCC = 4.5 V TEST CONDITIONS II = -18 mA IOH = -3 mA IOH = -3 mA IOH = -24 mA IOH = -32 mA IOL = 48 mA IOL = 64 mA 100 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0, VCC = 5.5 V, VCC = 5.5 V, VI = VCC or GND VO = 2.7 V VO = 0.5 V VI or VO 4.5 V VO = 5.5 V VO = 2.5 V Outputs high -50 Outputs high VCC = 5.5 V, IO = 0, VI = VCC or GND VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 3.5 6.5 Outputs low Outputs disabled -100 1 24 0.5 ±1 10 -10 ±100 50 -180 250 30 250 1.5 -50 ±1 10 -10 ±500 50 -180 250 30 250 1.5 -50 ±1 10 -10 ±100 50 -180 250 30 250 1.5 MIN 2.5 3 2 2* 0.55 0.55* 0.55 0.55 V mV µA µA µA µA µA mA µA mA µA mA pF pF TA = 25°C TYP MAX -1.2 2.5 3 2 2 SN54ABT574 MIN MAX -1.2 2.5 3 V SN74ABT574A MIN MAX -1.2 UNIT V
VOH
ICC¶ Ci Co
* On products compliant to MIL-PRF-38535, this parameter does not apply. All typical values are at VCC = 5 V. This data-sheet limit may vary among suppliers. § Not more than one output should be tested at a time, and the duration of the test should not exceed one second. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1)
SN54ABT574 VCC = 5 V, TA = 25°C MIN fclock tw tsu th Clock frequency Pulse duration, CLK high or low High Setup time, data before CLK Hold time, data after CLK Low High or low 3.3 1.5 2 2 MAX 150 3.3 1.5 2 2 ns ns 150 MHz ns MIN MAX UNIT
4
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ABT574, SN74ABT574A OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SCBS191F - JANUARY 1991 - REVISED SEPTEMBER 2003
timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1)
SN74ABT574A VCC = 5 V, TA = 25°C MIN fclock tw tsu Clock frequency Pulse duration, CLK high or low High Setup time, data before CLK Low High or low 3.3 1 1.5 1.8 MAX 150 3.3 1 1.5 1.8 ns ns 150 MHz ns MIN MAX UNIT
th Hold time, data after CLK This data-sheet limit may vary among suppliers.
switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54ABT574 PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C MIN fmax tPLH tPHL tPZH tPZL tPHZ tPLZ 150 2.2 CLK OE OE Q Q Q 3 1 2.5 2.4 2 TYP 200 3.9 4.8 3.3 4.7 4.9 4 6.2 7 5 5.9 6.2 5.8 MAX 150 2.2 3 1 2.5 2.4 2 7 7.4 5.8 7.2 7.2 6.9 ns ns ns MHz MIN MAX UNIT
switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN74ABT574A PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C MIN fmax tPLH tPHL tPZH tPZL tPHZ tPLZ 150 2.2 CLK OE OE Q Q Q 3 1 2.1 2.4 2 TYP 200 3.9 4.8 3.3 4.7 4.9 4 6.2 6.6 4.3 5.9 6.2 5.8 MAX 150 2.2 3 1 2.1 2.4 2 6.8 7.1 5.1 6.7 7 6.5 ns ns ns MHz MIN MAX UNIT
This data-sheet limit may vary among suppliers.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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