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Part: 5962-9474801QXA

Category:
 Multimedia
   -> Video
     -> Imaging
             -> Color Palettes

Description: ti TLC34076-135, Video InterfacE PALette

Company: Texas Instruments, Inc.

Datasheet: Download 5962-9474801QXA datasheet     File size : 493 kB

Request For quote: Find where to buy 5962-9474801QXA



Datasheet text preview:
TLC34076, TLC34076M Data Manual

Video Interface Palette

SLAS054A October 1997

Printed on Recycled Paper

IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used.

Copyright 1997, Texas Instruments Incorporated

Contents
Section 1 Title Page 1­1 1­1 1­3 1­4 1­7 1­8 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Terminal Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Terminal Functions (TLC34076C and TLC34076M) . . . . . . . . . . . . . . . . . . . . . . . . .

2

Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­1 2.1 Microprocessor Unit (MPU) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­1 2.2 Color Palette RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­1 2.2.1 Writing to the Color Palette RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­2 2.2.2 Reading From the Color Palette RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­2 2.2.3 Palette Page Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­2 2.3 Input/Output Clock Selection and Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­2 2.3.1 SCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­5 2.3.2 VCLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­6 2.4 Multiplexing Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­8 2.4.1 VGA Pass-Through Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­11 2.4.2 Multiplexing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­12 2.4.3 Special Nibble Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­12 2.4.4 True-Color Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­12 2.4.5 Multiplex Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­15 2.4.6 Read Masking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­16 2.5 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­16 2.5.1 Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­16 2.5.2 Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­16 2.5.3 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­16 2.5.4 VGA Pass-Through Mode Default Conditions . . . . . . . . . . . . . . . . . . . . . . . 2­17 2.6 Analog Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­17 2.7 Frame-Buffer Interface with Little-Endian and Big-Endian Modes . . . . . . . . . . . . 2­19 2.8 HSYNC, VSYNC, and BLANK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­19 2.9 Split Shift Register Transfer VRAMs and Special Nibble Mode . . . . . . . . . . . . . . 2­20 2.9.1 Split Shift Register Transfer VRAMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­20 2.9.2 Special Nibble Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­21 2.10 MUXOUT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­23 2.11 General Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­23 2.11.1 HSYNCOUT and VSYNCOUT (Bits 0 and 1) . . . . . . . . . . . . . . . . . . . . . . . 2­23 2.11.2 Split Shift Register Transfer Enable (SSRT) and Special Nibble Mode Enable (SNM) (Bits 2 and 3) . . . . . . . . . . . . . . . . . . . 2­23 2.11.3 Pedestal Enable Control (Bit 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­23 2.11.4 Sync Enable Control (Bit 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­24
iii

2.11.5 Little-Endian and Big-Endian Mode Control (Bit 6) . . . . . . . . . . . . . . . . . . 2.11.6 MUXOUT (Bit 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12 Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12.1 Frame-Buffer Data Flow Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12. Identification (ID) Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12.3 Ones-Accumulation Screen Integrity Test . . . . . . . . . . . . . . . . . . . . . . . . . . 2.12.4 Analog Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2­24 2­24 2­24 2­25 2­25 2­25 2­26

Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­1 3.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range (Unless Otherwise Noted) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­1 3.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­1 3.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­2 3.3.1 Electrical Characteristics for TLC34076C Over Operating Free-Air Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­2 3.3.2 Electrical Characteristics for TLC34076M Over Operating Free-Air Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­3 3.4 Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­4 3.4.1 Operating Characteristics for TLC34076C Over Recommended Ranges of Supply Voltage and Operating Free-Air Temperature . . . . . . . 3­4 3.4.2 Operating Characteristics for TLC34076M Over Recommended Ranges of Supply Voltage and Operating Free-Air Temperature . . . . . . . . 3­5 3.5 Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­6 3.5.1 Timing Requirements for TLC34076C Over Recommended Ranges of Supply Voltages and Operating Temperature . . . . . . . . . . . . . . . . . . . . . 3­6 3.5.2 Timing Requirements for TLC34076M Over Recommended Ranges of Supply Voltages and Operating Temperature . . . . . . . . . . . . . . . . . . . . . 3­8 3.6 Switching Characteristics for TLC34076C and TLC34076M Over Recommended Ranges of Supply Voltages and Operating Temperature . . . . . . 3­9 3.7 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­12

Appendix A SCLK/VCLK and the TMS340x0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A­1 Appendix B Printed Circuit Board Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . B­1 Appendix C SCLK Frequency < VCLK Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C­1 Appendix D Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D­1

iv

List of Illustrations
Figure Title Page 2­1 DOTCLK/VCLK/SCLK Relationship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­4 2­2 SCLK/VCLK Control Timing (SSRT Disabled, SCLK Frequency = VCLK Frequency) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­6 2­3 SCLK/VCLK Control Timing (SSRT Enabled, SCLK Frequency = VCLK Frequency) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­7 2­4 SCLK/VCLK Control Timing (SSRT Disabled, SCLK Frequency = 4 y VCLK Frequency) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­7 2­5 SCLK/VCLK Control Timing (SSRT Enabled, SCLK Frequency = 4 y VCLK Frequency) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­8 2­6 Equivalent Circuit of the IOG Current Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­17 2­7 7.5-IRE, 8-Bit Composite Video Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­18 2­8 0-IRE, 8-Bit Composite Video Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­18 2­9 Relationship Between SFLAG/NFLAG, BLANK, and SCLK . . . . . . . . . . . . . . . . . . . . . 2­20 2­10 SFLAG/NFLAG Timing in Special Nibble Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­22 2­11 Test-Register Control-Word State Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­25 2­12 Internal Comparator Circuitry for Analog Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2­27 3­1 MPU Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­12 3­2 Video Input/Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3­13 3­3 SFLAG/NFLAG Timing (When SSRT Function is Enabled) . . . . . . . . . . . . . . . . . . . . . 3­13

v




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