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Part: 5962-9669701QXA
Category:
Logic
-> Switches
-> Bus Exchange/Multiplexing Switches
Description: ti SN54CBT16209, 18-Bit Bus-exchange Switch
Company: Texas Instruments, Inc.
Datasheet: Download 5962-9669701QXA datasheet File size : 253 kB
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Datasheet text preview:
SN54CBT16209, SN74CBT16209A 18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006N NOVEMBER 1992 REVISED NOVEMBER 2001
D D D
Members of the Texas Instruments Widebus Family 5- Switch Connection Between Two Ports TTL-Compatible Input Levels
SN54CBT16209 . . . WD PACKAGE SN74CBT16209A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW)
description
The SN54CBT16209 and SN74CBT16209A devices provide 18 bits of high-speed TTL-compatible bus switching or exchanging. The low on-state resistance of the switches allows connections to be made with minimal propagation delay. The devices operate as an 18-bit bus switch or a 9-bit bus exchanger, which provides data exchanging between the four signal ports via the data-select (S0, S1, S2) terminals.
S0 1A1 1A2 GND 2A1 2A2 VCC 3A1 3A2 GND 4A1 4A2 5A1 5A2 GND 6A1 6A2 7A1 7A2 GND 8A1 8A2 9A1 9A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
S1 S2 1B1 1B2 2B1 2B2 GND 3B1 3B2 GND 4B1 4B2 5B1 5B2 GND 6B1 6B2 7B1 7B2 GND 8B1 8B2 9B1 9B2
ORDERING INFORMATION
TA PACKAGE SSOP DL DL 40°C to 85°C to 85°C TSSOP DGG TVSOP DGV Tube Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74CBT16209ADL SN74CBT616209ADLR SN74CBT16209ADGGR SN74CBT16209ADGVR TOP-SIDE MARKING CBT16209A CBT16209A CY209A
55°C to 125°C CFP WD Tube SNJ54CBT16209WD SNJ54CBT16209WD Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN54CBT16209, SN74CBT16209A 18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006N NOVEMBER 1992 REVISED NOVEMBER 2001
FUNCTION TABLE INPUTS S2 L L L L H H H H S1 L L H H L L H H S0 L H L H L H L H INPUTS/OUTPUTS A1 Z B1 B2 Z Z Z B1 B2 A2 Z Z Z B1 B2 Z B2 B1 FUNCTION Disconnect A1 port = B1 port A1 port = B2 port A2 port = B1 port A2 port = B2 port Disconnect A1 port = B1 port A2 port = B2 port A1 port = B2 port A2 port = B1 port
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54CBT16209, SN74CBT16209A 18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006N NOVEMBER 1992 REVISED NOVEMBER 2001
logic diagram (positive logic)
1A1 2 46 1B1
1A2
3
45 1B2
9A1
23
26
9B1
24 9A2
25 9B2
1 S0 48
S1
47 S2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SN54CBT16209, SN74CBT16209A 18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006N NOVEMBER 1992 REVISED NOVEMBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54CBT16209 MIN VCC VIH VIL TA Supply voltage High-level control input voltage Low-level control input voltage Operating free-air temperature 55 4 2 0.8 125 40 MAX 5.5 SN74CBT16209A MIN 4 2 0.8 85 MAX 5.5 UNIT V V V °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK II ICC ICC§ Ci Cio(OFF) VCC = 4.5 V, VCC = 0, VCC = 5.5 V, VCC = 5.5 V, Control inputs Control inputs VCC = 5.5 V, VI = 3 V or 0 VO = 3 V or 0, VCC = 4 V TYP at VCC = 4 V VCC = 4.5 V TEST CONDITIONS II = 18 mA VI = 5.5 V VI = 5.5 V or GND IO = 0, One input at 3.4 V, VI = VCC or GND Other inputs at VCC or GND 4 S0, S1, and S2 = GND VI = 2.4 V, VI = 0 II = 15 mA II = 64 mA II = 30 mA 7.5 14 4 4 20 8 8 MIN TYP MAX 1.2 10 ±1 3 2.5 UNIT V µA µA mA pF pF
ron¶
VI = 2.4 V, II = 15 mA 6 15 All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. § This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. ¶ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54CBT16209, SN74CBT16209A 18-BIT FET BUS-EXCHANGE SWITCHES
SCDS006N NOVEMBER 1992 REVISED NOVEMBER 2001
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54CBT16209 PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4 V MIN tpd tpd ten tdis A or B S S S B or A A or B A or B A or B 14 16 14.5 2 1.7 1 MAX VCC = 5 V ± 0.5 V MIN MAX 0.8* 13.1 15.3 13.2 SN74CBT16209A VCC = 4 V MIN MAX 0.35 9.9 10.3 9.3 1.5 1.5 1.5 VCC = 5 V ± 0.5 V MIN MAX 0.25 9 9.8 8.8 ns ns ns ns UNIT
* On products compliant to MIL-PRF-38535, this parameter is not production tested. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 3V LOAD CIRCUIT Output Control 1.5 V 1.5 V 0V tPZL 3V Input 1.5 V 1.5 V 0V tPLH tPHL VOH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) Output Waveform 1 S1 at 7 V (see Note B) tPZH tPLZ 3.5 V 1.5 V VOL + 0.3 V VOL tPHZ VOH VOH 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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