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Part: 5962-9761801Q2A
Category:
Logic
-> Gates
-> OR Gates
Description: ti SN54LVC32A, Quadruple 2-INPUT Positive-OR GATEs
Company: Texas Instruments, Inc.
Datasheet: Download 5962-9761801Q2A datasheet File size : 311 kB
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Datasheet text preview:
SN54LVC32A, SN74LVC32A QUADRUPLE 2 INPUT POSITIVE OR GATES
SCAS286O - JANUARY 1993 - REVISED SEPTEMBER 2003
D D D D D
Operate From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 3.8 ns at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C
D Latch-Up Performance Exceeds 250 mA Per D
JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101)
GND
NC - No internal connection
description/ordering information
The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V VCC operation. The 'LVC32A devices perform the Boolean function Y + A ) B or Y + A · B in positive logic. ORDERING INFORMATION
TA PACKAGE QFN - RGY Reel of 1000 Tube of 50 SOIC - D -40°C to 85 C 85°C SOP - NS SSOP - DB Reel of 2500 Reel of 250 Reel of 2000 Reel of 2000 Tube of 90 TSSOP - PW CDIP - J -55°C to 125 C 125°C CFP - W LCCC - FK Reel of 2000 Reel of 250 Tube of 25 Tube of 150 Tube of 55 ORDERABLE PART NUMBER SN74LVC32ARGYR SN74LVC32AD SN74LVC32ADR SN74LVC32ADT SN74LVC32ANSR SN74LVC32ADBR SN74LVC32APW SN74LVC32APWR SN74LVC32APWT SNJ54LVC32AJ SNJ54LVC32AW SNJ54LVC32AFK SNJ54LVC32AJ SNJ54LVC32AW SNJ54LVC32AFK LC32A LVC32A LC32A LVC32A TOP-SIDE MARKING LC32A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
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2Y GND NC 3Y 3A
1A 1B 1Y 2A 2B 2Y GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 4B 4A 4Y 3B 3A 3Y
1
14 13 4B 12 4A 11 4Y 10 3B 9 3A
VCC
1A
1B 1A NC VCC 4B 1Y NC 2A NC 2B
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
SN54LVC32A . . . J OR W PACKAGE SN74LVC32A . . . D, DB, NS, OR PW PACKAGE (TOP VIEW)
SN74LVC32A . . . RGY PACKAGE (TOP VIEW)
SN54LVC32A . . . FK PACKAGE (TOP VIEW)
1B 1Y 2A 2B 2Y
2 3 4 5 6 7 8
4A NC 4Y NC 3B
3Y
1
SN54LVC32A, SN74LVC32A QUADRUPLE 2 INPUT POSITIVE OR GATES
SCAS286O - JANUARY 1993 - REVISED SEPTEMBER 2003
description/ordering information (continued)
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
FUNCTION TABLE (each gate) INPUTS A H X L B X H L OUTPUT Y H H L
logic diagram, each gate (positive logic)
A B Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
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SN54LVC32A, SN74LVC32A QUADRUPLE 2 INPUT POSITIVE OR GATES
SCAS286O - JANUARY 1993 - REVISED SEPTEMBER 2003
recommended operating conditions (see Note 5)
SN54LVC32A -55 TO 125°C MIN Operating VCC Supply voltage Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V VIL VI VO Low-level input voltage Input voltage Output voltage VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3 V 12 24 7 -12 -24 VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0 0 2 2 1.5 MAX 3.6 MIN SN74LVC32A TA = 25°C MAX 3.6 -40 TO 85°C MIN 1.65 1.5 0.65×VCC 1.7 2 0.35×VCC 0.7 0.8 5.5 VCC 0 0 0.8 5.5 VCC -4 -8 -12 -24 4 8 12 24 7 0 0 0.35×VCC 0.7 0.8 5.5 VCC -4 -8 -12 -24 4 8 12 24 7 ns/V mA mA V V V V MAX 3.6 V UNIT
1.65 1.5 0.65×VCC 1.7 2
VIH
High-level input voltage
IOH
High-level output current
IOL
Low-level output current
t/v
Input transition rise or fall rate
NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SN54LVC32A, SN74LVC32A QUADRUPLE 2 INPUT POSITIVE OR GATES
SCAS286O - JANUARY 1993 - REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LVC32A PARAMETER TEST CONDITIONS VCC 1.65 V to 3.6 V 2.7 V to 3.6 V 1.65 V 2.3 V 2.7 V IOH = -12 mA IOH = -24 mA IOL = 100 µA A VOL IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA II ICC ICC Ci VI = 5.5 V or GND VI = VCC or GND, IO = 0 One input at VCC - 0.6 V, Other inputs at VCC or GND VI = VCC or GND 3V 3V 1.65 V to 3.6 V 2.7 V to 3.6 V 1.65 V 2.3 V 2.7 V 3V 3.6 V 3.6 V 2.7 V to 3.6 V 3.3 V 0.4 0.55 ±5 10 500 5 0.2 0.24 0.3 0.4 0.55 ±1 1 500 0.45 0.7 0.4 0.55 ±5 10 500 µA µA µA pF V 2.2 2.4 2.2 VCC-0.2 1.29 1.9 2.2 2.4 2.3 0.1 1.2 1.7 2.2 2.4 2.2 0.2 V -55 TO 125°C MIN IOH = -100 µA A IOH = -4 mA IOH = -8 mA MAX SN74LVC32A TA = 25°C MIN TYP MAX VCC-0.2 -40 TO 85°C MIN VCC-0.2 MAX UNIT
VOH
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN54LVC32A PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2.7 V tpd A or B Y 3.3 V ± 0.3 V 1 -55 TO 125°C MIN MAX 4.4 3.8 ns UNIT
switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN74LVC32A PARAMETER FROM (INPUT) TO (OUTPUT) VCC MIN 1.8 V ± 0.15 V tpd A or B Y 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V tsk(o) 3.3 V ± 0.3 V 1 1 1 1 TA = 25°C TYP MAX 4.2 2.6 3 2.5 8.2 4.9 4.2 3.6 -40 TO 85°C MIN 1 1 1 1 MAX 8.7 5.4 4.4 3.8 1 ns ns UNIT
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54LVC32A, SN74LVC32A QUADRUPLE 2 INPUT POSITIVE OR GATES
SCAS286O - JANUARY 1993 - REVISED SEPTEMBER 2003
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS VCC 1.8 V Cpd Power dissipation capacitance per gate f = 10 MHz 2.5 V 3.3 V TYP 7.5 10.6 12.5 pF UNIT
POST OFFICE BOX 655303
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